ADSP-2173BST-80 Analog Devices Inc, ADSP-2173BST-80 Datasheet - Page 2

• Manufacturer Part Number: ADSP-2173BST-80
• Description: IC DSP CONTROLLER 16BIT 128TQFP
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2173BST-80

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Serial Port
• Clock Rate: 20MHz
• Non-volatile Memory: External
• On-chip Ram: 10kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Device Core Size: 16b
• Architecture: Enhanced Harvard
• Format: Fixed Point
• Clock Freq (max): 20MHz
• Mips: 20
• Device Input Clock Speed: 20MHz
• Ram Size: 10KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

ADSP-2171/ADSP-2172/ADSP-2173
Development System
The ADSP-2100 Family Development Software, a complete set
of tools for software and hardware system development, supports
the ADSP-217x. The System Builder provides a high-level
method for defining the architecture of systems under develop-
ment. The Assembler has an algebraic syntax that is easy to
program and debug. The Linker combines object files into
an executable file. The Simulator provides an interactive
instruction-level simulation with a reconfigurable user interface
to display different portions of the hardware environment. A
PROM Splitter generates PROM programmer compatible files.
The C Compiler, based on the Free Software Foundation’s
GNU C Compiler, generates ADSP-217x assembly source
code. The Runtime Library includes over 100 ANSI-standard
mathematical and DSP-specific functions.
EZ-Tools, low cost, easy-to-use hardware tools, also support the
ADSP-217x.
The ADSP-217x EZ-ICE
bugging of ADSP-217x systems. The emulator consists of hard-
ware, host computer resident software, the emulator probe, and
the pin adaptor. The emulator performs a full range of emula-
tion functions including stand-alone operation or operation in
the target, setting up to 20 breakpoints, single-step or full-speed
operation in the target, examining and altering registers and
memory values, and PC upload/download functions. If you plan
to use the emulator, you should consider the emulator’s restric-
tions (differences between emulator and processor operation).
The EZ-LAB
operate in stand-alone mode. The evaluation board/system de-
velopment board executes EPROM-based or downloaded pro-
grams. Modular Analog Front End daughter cards with different
codecs will be made available.
EZ-ICE and EZ-LAB are registered trademarks of Analog Devices, Inc.
GENERATOR
OUTPUT REGS
ADDRESS
INPUT REGS
DATA
#1
ALU
®
Evaluation Board is a PC plug-in card, but it can
GENERATOR
ADDRESS
DATA
#2
OUTPUT REGS
INPUT REGS
®
MAC
Emulator aids in the hardware de-
16
R BUS
INSTRUCTION
SEQUENCER
PROGRAM
REGISTER
OUTPUT REGS
INPUT REGS
EXCHANGE
SHIFTER
BUS
Figure 1. ADSP-217x Block Diagram
14
16
14
24
PROGRAM SRAM
PROGRAM ROM
8K X 24
2K X 24
CONTROL
LOGIC
DMA BUS
PMD BUS
DMD BUS
–2–
PMA BUS
TRANSMIT REG
RECEIVE REG
Additional Information
This data sheet provides a general overview of ADSP-217x
functionality. For additional information on the architecture and
instruction set of the processor, refer to the ADSP-2100 Family
User’s Manual. For more information about the Development
System and ADSP-217x programmer’s reference information,
refer to the ADSP-2100 Family Assembler Tools & Simulator
Manual.
ARCHITECTURE OVERVIEW
Figure 1 is an overall block diagram of the ADSP-217x. The
processor contains three independent computational units: the
ALU, the multiplier/accumulator (MAC) and the shifter. The
computational units process 16-bit data directly and have provi-
sions to support multiprecision computations. The ALU per-
forms a standard set of arithmetic and logic operations; division
primitives are also supported. The MAC performs single-cycle
multiply, multiply/add and multiply/subtract operations with
40 bits of accumulation. The shifter performs logical and
arithmetic shifts, normalization, denormalization, and derive
exponent operations. The shifter can be used to efficiently
implement numeric format control including multiword and
block floating-point representations.
The internal result (R) bus directly connects the computational
units so that the output of any unit may be the input of any unit
on the next cycle.
A powerful program sequencer and two dedicated data address
generators ensure efficient delivery of operands to these compu-
tational units. The sequencer supports conditional jumps, sub-
routine calls and returns in a single cycle. With internal loop
counters and loop stacks, the ADSP-217x executes looped code
with zero overhead; no explicit jump instructions are required to
maintain the loop.
SERIAL
PORT 0
5
COMPANDING
2K X 16
CIRCUITRY
SRAM
DATA
TRANSMIT REG
RECEIVE REG
SERIAL
PORT 1
5
GENERATOR
ADDRESS
BOOT
TIMER
POWER DOWN
CONTROL
LOGIC
FLAGS
REGISTERS
MUX
MUX
CONTROL
HIP
HIP
14
EXTERNAL
EXTERNAL
ADDRESS
3
24
2
REV. A
DATA
BUS
BUS
DATA
BUS
11
HIP
16