EP1K100QC208-2N Altera, EP1K100QC208-2N Datasheet - Page 30

• Manufacturer Part Number: EP1K100QC208-2N
• Description: IC ACEX 1K FPGA 100K 208-PQFP
• Manufacturer: Altera
• Series: ACEX-1K®r

Specifications of EP1K100QC208-2N

• Number Of Logic Elements/cells: 4992
• Number Of Labs/clbs: 624
• Total Ram Bits: 49152
• Number Of I /o: 147
• Number Of Gates: 257000
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Family Name: ACEX™ 1K
• Number Of Usable Gates: 100000
• Number Of Logic Blocks/elements: 4992
• # I/os (max): 147
• Frequency (max): 250MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 2.5V
• Logic Cells: 4992
• Ram Bits: 49152
• Device System Gates: 257000
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1824; EP1K100QC208-2N

ACEX 1K Programmable Logic Device Family Data Sheet
Figure 15. ACEX 1K Bidirectional I/O Registers
30
Row and Column
Interconnect
4 Dedicated
Inputs
4
Clock Inputs
2 Dedicated
2
Control Bus
Peripheral
12
CLK[3..2]
CLK[1..0]
OE[7..0]
VCC
ENA[5..0]
VCC
VCC
VCC
CLRN[1..0]
VCC
Programmable Delay
VCC
Chip-Wide
Chip-Wide
Chip-Wide
Reset
Reset
Reset
Output Register
Input Register
OE Register
D
D
D
ENA
ENA
ENA
CLRN
CLRN
CLRN
Output Enable
Q
Q
Q
Chip-Wide
Open-Drain
Slew-Rate
Control
Output
Altera Corporation