EP2C35U484I8N Altera, EP2C35U484I8N Datasheet - Page 24
EP2C35U484I8N
Manufacturer Part Number
EP2C35U484I8N
Description
IC CYCLONE II FPGA 33K 484-UBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C35U484I8N
Number Of Logic Elements/cells
33216
Number Of Labs/clbs
2076
Total Ram Bits
483840
Number Of I /o
322
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-UBGA
For Use With
P0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2115
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MultiTrack Interconnect
2–12
Cyclone II Device Handbook, Volume 1
R24 row interconnects span 24 LABs and provide the fastest resource for
long row connections between non-adjacent LABs, M4K memory blocks,
dedicated multipliers, and row IOEs. R24 row interconnects drive to
other row or column interconnects at every fourth LAB. R24 row
interconnects drive LAB local interconnects via R4 and C4 interconnects
and do not drive directly to LAB local interconnects. R24 interconnects
can drive R24, R4, C16, and C4 interconnects.
Column Interconnects
The column interconnect operates similar to the row interconnect. Each
column of LABs is served by a dedicated column interconnect, which
vertically routes signals to and from LABs, M4K memory blocks,
embedded multipliers, and row and column IOEs. These column
resources include:
■
■
■
Cyclone II devices include an enhanced interconnect structure within
LABs for routing LE output to LE input connections faster using register
chain connections. The register chain connection allows the register
output of one LE to connect directly to the register input of the next LE in
the LAB for fast shift registers. The Quartus II Compiler automatically
takes advantage of these resources to improve utilization and
performance.
Register chain interconnects within an LAB
C4 interconnects traversing a distance of four blocks in an up and
down direction
C16 interconnects for high-speed vertical routing through the device
Figure 2–9
shows the register chain interconnects.
Altera Corporation
February 2007
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