EP1S10F672C7N Altera, EP1S10F672C7N Datasheet - Page 58

IC STRATIX FPGA 10K LE 672-FBGA

EP1S10F672C7N

Manufacturer Part Number
EP1S10F672C7N
Description
IC STRATIX FPGA 10K LE 672-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S10F672C7N

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
345
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1851
EP1S10F672C7N

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TriMatrix Memory
2–44
Stratix Device Handbook, Volume 1
Independent Clock Mode
The memory blocks implement independent clock mode for true dual-
port memory. In this mode, a separate clock is available for each port
(ports A and B). Clock A controls all registers on the port A side, while
clock B controls all registers on the port B side. Each port, A and B, also
supports independent clock enables and asynchronous clear signals for
port A and B registers.
independent clock mode.
Figure 2–24
shows a TriMatrix memory block in
Altera Corporation
July 2005

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