EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 39

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EP2AGX95EF29C4N

Manufacturer Part Number
EP2AGX95EF29C4N
Description
IC ARRIA II GX FPGA 95K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX95EF29C4N

Number Of Logic Elements/cells
89178
Number Of Labs/clbs
3747
Total Ram Bits
6679
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
93674
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
93674
Ram Bits
7025459.2
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2AGX95EF29C4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2AGX95EF29C4N
Manufacturer:
ALTERA
0
Part Number:
EP2AGX95EF29C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
Table 1–35. Transceiver Specifications for Arria II GZ Devices (Part 4 of 6)
December 2010 Altera Corporation
Programmable DC gain
Transmitter
Supported I/O Standards
Data rate
V
Differential on-chip
termination resistors
Differential and common
mode return loss
Rise time
Fall time
Intra-differential pair skew
Intra-transceiver block
transmitter
channel-to-channel skew
Inter-transceiver block
transmitter
channel-to-channel skew
CMU0 PLL and CMU1 PLL
Supported Data Range
OCM
Description
(11)
Symbol/
(10)
(11)
DC Gain Setting = 0
DC Gain Setting = 1
DC Gain Setting = 2
DC Gain Setting = 3
DC Gain Setting = 4
Example: PCIe ×8,
Serial RapidIO SR
Serial RapidIO LR
CPRI HV (V
Gen2 (TX V
XAUI (TX V
PCIe ×4, Basic ×4
CPRI LV (V
×4 PMA and PCS
×8 PMA and PCS
OBSAI (V
Example: XAUI,
100 setting
120 setting
PCIe Gen1 and
SATA (V
150- setting
0.65 V setting
bonded mode
bonded mode
85 setting
(TX V
(TX V
Conditions
CEI SR/LR
(V
(V
Basic ×8
HiGig+
OD
OD
OD
OD
=6),
=8),
OD
OD
=6),
=8),
OD
OD
OD
OD
=4),
=6),
=6),
=6),
=4),
=2),
Min
600
600
50
50
–C3 and –I3
100 ± 15%
120 ± 15%
150 ± 15%
85 ± 15%
650
Typ
12
0
3
6
9
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
1.5-V PCML
(1)
6375
Max
6375
200
200
120
500
15
Compliant
Min
600
600
50
50
–C4 and –I4
100 ± 15%
120 ± 15%
150 ± 15%
85 ± 15%
Typ
650
12
0
3
6
9
3750
Max
3750
200
200
120
500
15
Mbps
Mbps
Unit
mV
dB
dB
dB
dB
dB
ps
ps
ps
ps
ps
1–31

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