EP1SGX25DF1020C5N Altera, EP1SGX25DF1020C5N Datasheet - Page 258

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EP1SGX25DF1020C5N

Manufacturer Part Number
EP1SGX25DF1020C5N
Description
IC STRATIX GX FPGA 25K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet

Specifications of EP1SGX25DF1020C5N

Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
607
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1SGX25DF1020C5N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1SGX25DF1020C5N
Manufacturer:
ALTERA
0
Timing Model
6–56
Stratix GX Device Handbook, Volume 1
1.8 V
1.5 V
LVCMOS
GTL
GTL+
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
SSTL-18 class I
SSTL-18 class II
1.5-V HSTL class I
1.5-V HSTL class II
1.8-V HSTL class I
1.8-V HSTL class II
3.3-V PCI
3.3-V PCI-X 1.0
Compact PCI
AGP 1×
AGP 2×
CTT
Differential HSTL
LVDS
LVPECL
PCML
HyperTransport technology
LVTTL
2.5 V
Table 6–83. Stratix GX Maximum Input Clock Rate for CLK[1, 3, 8, 10] Pins (Part 2 of 2)
Table 6–84. Stratix GX Maximum Output Clock Rate for PLL[5, 6, 11, 12] Pins (Part 1 of 2)
I/O Standard
I/O Standard
Tables 6–84
and row pins in Stratix GX devices.
and
-5 Speed Grade -6 Speed Grade -7 Speed Grade
-5 Speed Grade -6 Speed Grade -7 Speed Grade
6–85
422
422
422
300
300
400
400
400
400
400
400
400
400
400
400
422
422
422
422
422
300
400
645
645
300
645
350
350
show the maximum output clock rate for column
422
422
422
250
250
350
350
350
350
350
350
350
350
350
350
422
422
422
422
422
250
350
645
645
275
645
300
300
390
390
390
200
200
300
300
300
300
300
300
300
300
300
300
390
390
390
390
390
200
300
640
640
275
640
250
300
Altera Corporation
June 2006
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit

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