EP1S30F780I6 Altera, EP1S30F780I6 Datasheet - Page 69

• Manufacturer Part Number: EP1S30F780I6
• Description: IC STRATIX FPGA 30K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S30F780I6

• Number Of Logic Elements/cells: 32470
• Number Of Labs/clbs: 3247
• Total Ram Bits: 3317184
• Number Of I /o: 597
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 32470
• # I/os (max): 597
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 32470
• Ram Bits: 3317184
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1861; EP1S30F780I6

Figure 2–30. DSP Block Diagram for 18 × 18-Bit Configuration
Altera Corporation
July 2005
Optional Serial
Shift Register
Outputs to
Next DSP Block
in the Column
Optional Serial Shift Register
Inputs from Previous
DSP Block
D
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
ENA
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
CLRN
Q
Q
Q
Q
Q
Q
Q
Q
Multiplier Stage
Optional Input Register
Stage with Parallel Input or
Shift Register Configuration
D
ENA
D
ENA
D
ENA
D
ENA
CLRN
CLRN
CLRN
CLRN
Q
Q
Q
Q
Optional Stage Configurable
as Accumulator or Dynamic
Adder/Subtractor
Optional Pipeline
Register Stage
Accumulator
Accumulator
Subtractor/
Subtractor/
Adder/
Adder/
1
2
Summation Stage
for Adding Four
Multipliers Together
Stratix Device Handbook, Volume 1
Summation
Output Selection
Multiplexer
to MultiTrack
Interconnect
Stratix Architecture
Optional Output
Register Stage
2–55