EP2S90F780I4 Altera, EP2S90F780I4 Datasheet - Page 84

IC STRATIX II FPGA 90K 780-FBGA

EP2S90F780I4

Manufacturer Part Number
EP2S90F780I4
Description
IC STRATIX II FPGA 90K 780-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F780I4

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2170

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I/O Structure
Figure 2–51. Stratix II IOE in Bidirectional I/O Configuration
Notes to
(1)
(2)
2–76
Stratix II Device Handbook, Volume 1
Column, Row,
Interconnect
or Local
All input signals to the IOE can be inverted at the IOE.
The optional PCI clamp is only available on column I/O pins.
ioe_clk[7..0]
Figure
2–51:
clkout
clkin
oe
ce_out
aclr/apreset
ce_in
sclr/spreset
Chip-Wide Reset
Figure 2–51
shows the IOE in bidirectional configuration.
Output Register
Input Register
OE Register
D
ENA
CLRN/PRN
ENA
D
CLRN/PRN
D
CLRN/PRN
ENA
Q
Q
Q
Drive Strength Control
Open-Drain Output
Pin Delay
Note (1)
Output
Input Register Delay
Logic Array Delay
Input Pin to
Input Pin to
OE Register
t
CO
Delay
V
CCIO
PCI Clamp (2)
V
Altera Corporation
CCIO
Bus-Hold
Circuit
Termination
On-Chip
Programmable
Pull-Up
Resistor
May 2007

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