EP2S130F1020I5 Altera, EP2S130F1020I5 Datasheet - Page 48

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EP2S130F1020I5

Manufacturer Part Number
EP2S130F1020I5
Description
IC STRATIX II FPGA 130K 1020FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S130F1020I5

Number Of Logic Elements/cells
132540
Number Of Labs/clbs
6627
Total Ram Bits
6747840
Number Of I /o
742
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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0
Digital Signal Processing Block
Digital Signal
Processing
Block
2–40
Stratix II Device Handbook, Volume 1
The most commonly used DSP functions are FIR filters, complex FIR
filters, IIR filters, fast Fourier transform (FFT) functions, direct cosine
transform (DCT) functions, and correlators. All of these use the multiplier
as the fundamental building block. Additionally, some applications need
specialized operations such as multiply-add and multiply-accumulate
operations. Stratix II devices provide DSP blocks to meet the arithmetic
requirements of these functions.
Each Stratix II device has from two to four columns of DSP blocks to
efficiently implement DSP functions faster than ALM-based
implementations. Stratix II devices have up to 24 DSP blocks per column
(see
As indicated, the Stratix II DSP block can support one 36 × 36-bit
multiplier in a single DSP block. This is true for any combination of
signed, unsigned, or mixed sign multiplications.
1
Table
Eight 9 × 9-bit multipliers
Four 18 × 18-bit multipliers
One 36 × 36-bit multiplier
This list only shows functions that can fit into a single DSP block.
Multiple DSP blocks can support larger multiplication
functions.
2–5). Each DSP block can be configured to support up to:
Altera Corporation
May 2007

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