EP2S180F1508C4 Altera, EP2S180F1508C4 Datasheet - Page 163

IC STRATIX II FPGA 180K 1508FBGA

EP2S180F1508C4

Manufacturer Part Number
EP2S180F1508C4
Description
IC STRATIX II FPGA 180K 1508FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S180F1508C4

Number Of Logic Elements/cells
179400
Number Of Labs/clbs
8970
Total Ram Bits
9383040
Number Of I /o
1170
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1508-FBGA
For Use With
544-1701 - DSP PRO KIT W/SII EP2S180N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1416

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2S180F1508C4
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2S180F1508C4
Manufacturer:
ALTERA
0
Part Number:
EP2S180F1508C4
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2S180F1508C4ES
Manufacturer:
ALTERA
0
Part Number:
EP2S180F1508C4ES
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2S180F1508C4N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP2S180F1508C4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2S180F1508C4N
Manufacturer:
ALTERA
0
Part Number:
EP2S180F1508C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
April 2011
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
1.8-V HSTL Class II
1.5-V HSTL Class I
1.5-V HSTL Class II
1.2-V HSTL with OCT
Differential SSTL-2 Class I
Differential SSTL-2 Class II
Differential SSTL-18 Class I
Differential SSTL-18 Class II
1.5-V Differential HSTL Class I
1.5-V Differential HSTL Class II
1.8-V Differential HSTL Class I
1.8-V Differential HSTL Class II
LVDS
HyperTransport
LVPECL
Table 5–35. Timing Measurement Methodology for Input Pins (Part 2 of 2)
Input buffer sees no load at buffer input.
Input measuring point at buffer input is 0.5 × V
Output measuring point is 0.5 × V
Input edge rate is 1 V/ns.
Less than 50-mV ripple on V
V
CCPD
Table
= 2.97 V, less than 50-mV ripple on V
I/O Standard
5–35:
Performance
Table 5–36
performance values were obtained with the Quartus II software
compilation of library of parameterized modules (LPM), or MegaCore
functions for the finite impulse response (FIR) and fast Fourier transform
(FFT) designs.
CCIO
and V
CC
at internal node.
CCPD
shows Stratix II performance for some common designs. All
V
CCIO
, V
CCIO
1.660
1.375
1.375
1.140
2.325
2.325
1.660
1.660
1.375
1.375
1.660
1.660
2.325
2.325
3.135
CCINT
CCIO
and V
(V)
Measurement Conditions
.
= 1.15 V with less than 30-mV ripple
CCPD
, V
V
0.830
0.688
0.688
0.570
1.163
1.163
0.830
0.830
0.688
0.688
0.830
0.830
REF
CCINT
(V)
= 1.15 V
Stratix II Device Handbook, Volume 1
Edge Rate (ns)
DC & Switching Characteristics
1.660
1.375
1.375
1.140
2.325
2.325
1.660
1.660
1.375
1.375
1.660
1.660
0.100
0.400
0.100
Notes (1)–(4)
Measurement Point
V
M E A S
0.6875
0.6875
0.6875
0.6875
1.1625
1.1625
1.5675
1.1625
1.1625
0.570
0.83
0.83
0.83
0.83
0.83
(V)
5–27
®

Related parts for EP2S180F1508C4