XA3S400A-4FGG400Q Xilinx Inc, XA3S400A-4FGG400Q Datasheet - Page 23

• Manufacturer Part Number: XA3S400A-4FGG400Q
• Description: IC FPGA SPARTAN-3A 400K 400-FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A XAr

Specifications of XA3S400A-4FGG400Q

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 368640
• Number Of I /o: 311
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 400-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Input Timing Adjustments
Table 22:
DS681 (v1.1) February 3, 2009
Product Specification
LVCMOS25 to the Following
Single-Ended Standards
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33_3
HSTL_I
HSTL_III
HSTL_I_18
HSTL_II_18
HSTL_III_18
SSTL18_I
SSTL18_II
SSTL2_I
SSTL2_II
SSTL3_I
SSTL3_II
Convert Input Time from
Signal Standard
(IOSTANDARD)
Input Timing Adjustments by IOSTANDARD
R
Speed Grade
Adjustment
Add the
Below
0.62
0.54
0.83
0.60
0.31
0.45
0.72
0.85
0.69
0.83
0.79
0.71
0.71
0.71
0.71
0.78
0.78
-4
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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Table 22:
Notes:
1.
2.
LVCMOS25 to the Following
Differential Standards
LVDS_25
LVDS_33
BLVDS_25
MINI_LVDS_25
MINI_LVDS_33
LVPECL_25
LVPECL_33
RSDS_25
RSDS_33
TMDS_33
PPDS_25
PPDS_33
DIFF_HSTL_I_18
DIFF_HSTL_II_18
DIFF_HSTL_III_18
DIFF_HSTL_I
DIFF_HSTL_III
DIFF_SSTL18_I
DIFF_SSTL18_II
DIFF_SSTL2_I
DIFF_SSTL2_II
DIFF_SSTL3_I
DIFF_SSTL3_II
Convert Input Time from
The numbers in this table are tested using the methodology
presented in
conditions set forth in
These adjustments are used to convert input path times
originally specified for the LVCMOS25 standard to times that
correspond to other signal standards.
Signal Standard
(IOSTANDARD)
Input Timing Adjustments by
Table 26
Table
and are based on the operating
8,
Table
Speed Grade
Adjustment
Add the
Below
0.79
0.79
0.79
0.84
0.84
0.80
0.80
0.83
0.83
0.80
0.81
0.81
0.80
0.98
1.05
0.77
1.05
0.76
0.76
0.77
0.77
1.06
1.06
11, and
-4
Table
13.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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