XC6VCX75T-2FFG784I Xilinx Inc, XC6VCX75T-2FFG784I Datasheet - Page 2

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XC6VCX75T-2FFG784I

Manufacturer Part Number
XC6VCX75T-2FFG784I
Description
IC FPGA VIRTEX 6 74K 784FFGBGA
Manufacturer
Xilinx Inc
Series
Virtex™ 6 CXTr
Datasheet

Specifications of XC6VCX75T-2FFG784I

Number Of Logic Elements/cells
74496
Number Of Labs/clbs
5820
Total Ram Bits
5750784
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
784-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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Virtex-6 CXT FPGA Feature Summary
Table 1: Virtex-6 CXT FPGA Feature Summary by Device
Virtex-6 CXT FPGA Device-Package Combinations and Maximum I/Os
Virtex-6 CXT FPGA package combinations with the maximum available I/Os per package are shown in
Table 2: Virtex-6 CXT FPGA Device-Package Combinations and Maximum Available I/Os
Virtex-6 CXT FPGA Ordering Information
The Virtex-6 CXT FPGA ordering information shown in
X-Ref Target - Figure 1
DS153 (v1.6) February 11, 2011
Product Specification
Notes:
1.
2.
3.
4.
5.
6.
7.
Notes:
1.
XC6VCX75T
XC6VCX130T
XC6VCX195T
XC6VCX240T
Device
XC6VCX75T
XC6VCX130T
XC6VCX195T
XC6VCX240T
Device
Each Virtex-6 CXT FPGA slice contains four LUTs and eight flip-flops, only some slices can use their LUTs as distributed RAM or SRLs.
Each DSP48E1 slice contains a 25 x 18 multiplier, an adder, and an accumulator.
Block RAMs are fundamentally 36 Kbits in size. Each block can also be used as two independent 18 Kb blocks.
Each CMT contains two mixed-mode clock managers (MMCM).
This table lists individual Ethernet MACs per device.
Does not include configuration Bank 0.
This number does not include GTX transceivers.
Flip-chip packages are also available in Pb-Free versions (FFG).
Size (mm)
Package
128,000
199,680
241,152
74,496
Logic
Cells
Example: XC6VCX240T-1FFG1156C
Speed Grade
Device Type
(-1, -2)
8 GTXs
8 GTXs
Slices
11,640
20,000
31,200
37,680
GTs
Configurable Logic
Blocks (CLBs)
(1)
FFG484
23 x 23
FF484
Distributed
RAM (Kb)
1,045
1,740
3,040
3,650
Max
Figure 1: Virtex-6 CXT FPGA Ordering Information
DSP48E1
240
240
Slices
I/O
288
480
640
768
(2)
18 Kb
312
528
688
832
Block RAM Blocks
(3)
www.xilinx.com
Figure 1
36 Kb
156
264
344
416
12 GTXs
12 GTXs
12 GTXs
12 GTXs
GTs
Max (Kb)
12,384
14,976
5,616
9,504
applies to all packages including Pb-Free.
Number of Pins
Pb-Free
Package Type
FFG784
29 x 29
FF784
Temperature Range:
C = Commercial (T
I = Industrial (T
MMCMs
10
10
12
6
(4)
360
400
400
400
I/O
PCI Express
Blocks for
Interface
J
1
2
2
2
= –40°C to +100°C)
J
= 0°C to +85°C)
Virtex-6 CXT Family Data Sheet
Ethernet
MACs
1
1
1
1
16 GTXs
16 GTXs
16 GTXs
DS153_01_062109
(5)
GTs
Transceivers
Maximum
FFG1156
FF1156
GTX
35 x 35
12
16
16
16
Table
2.
Banks
Total
I/O
15
15
18
9
600
600
600
I/O
(6)
I/O
User
Max
360
600
600
600
(7)
2

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