XC5VLX110-1FFG1153C Xilinx Inc, XC5VLX110-1FFG1153C Datasheet - Page 308

• Manufacturer Part Number: XC5VLX110-1FFG1153C
• Description: IC FPGA VIRTEX-5 110K 1153FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX110-1FFG1153C

• Total Ram Bits: 4718592
• Number Of Logic Elements/cells: 110592
• Number Of Labs/clbs: 8640
• Number Of I /o: 800
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1153-BBGA, FCBGA
• No. Of Logic Blocks: 8640
• No. Of Macrocells: 110000
• Family Type: Virtex-5
• No. Of Speed Grades: 1
• No. Of I/o's: 800
• Clock Management: DCM, PLL
• Core Supply: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 6: SelectIO Resources
308
Table 6-40: Maximum Number of Simultaneously Switching Outputs per Bank (Continued)
Voltage
1.5V
LVCMOS15_2_slow
LVCMOS15_4_slow
LVCMOS15_6_slow
LVCMOS15_8_slow
LVCMOS15_12_slow
LVCMOS15_16_slow
LVCMOS15_2_fast
LVCMOS15_4_fast
LVCMOS15_6_fast
LVCMOS15_8_fast
LVCMOS15_12_fast
LVCMOS15_16_fast
LVDCI_15 50 Ω
HSTL_I_15
HSTL_I_15_DCI
HSTL_II_15
HSTL_II_15_DCI
HSTL_III_15
HSTL_III_15_DCI
HSTL_IV_15
HSTL_IV_15_DCI
HSLVDCI_15 50 Ω
DIFF_HSTL_I_15
DIFF_HSTL_I_15_DCI
DIFF_HSTL_II_15
DIFF_HSTL_II_15_DCI
IOSTANDARD
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Limit per 20-pin Bank
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
12
12
20
20
20
20
20
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Limit per 40-pin Bank
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
25
25
40
40
40
40
40