AT43USB320A-AC Atmel, AT43USB320A-AC Datasheet - Page 34

• Manufacturer Part Number: AT43USB320A-AC
• Description: IC USB MCU EMBED HUB AVR 100LQFP
• Manufacturer: Atmel
• Series: AVR®r

Specifications of AT43USB320A-AC

• Applications: USB Hub/Microcontroller
• Core Processor: AVR
• Controller Series: AT43USB
• Ram Size: 512 x 8
• Interface: SPI Serial, USB, UART
• Number Of I /o: 32
• Voltage - Supply: 4.4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Type: -

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AT43USB320A
USB Interrupt Enable Register – UIER
• Bit 7 – SOF IE: Enable Start of Frame Interrupt
When the SOF IE bit is set (1), the Start of Frame Interrupt is enabled.
• Bit 6 – EOF2 IE: Enable EOF2 Interrupt
When the EOF2 IE bit is set (1), the EOF2 Interrupt is enabled.
• Bit 5, 4 – Res: Reserved bit
These bits are reserved and always read as zero.
• Bit 3 – HEP0 IE: Enable Endpoint 0 Interrupt
When the HEP0 IE bit is set (1), the Hub Endpoint 0 Interrupt is enabled.
• Bit 2 – FEP2 IE: Enable Endpoint 2 Interrupt
When the FE2 IE bit is set (1), the Function Endpoint 2 Interrupt is enabled.
• Bit 1 – FEP1 IE: Enable Endpoint 1 Interrupt
When the FE1 IE bit is set (1), the Function Endpoint 1 Interrupt is enabled.
• Bit 0 – FEP0 IE: Enable Endpoint 0 Interrupt
When the FE0 IE bit is set (1), the Function Endpoint 0 Interrupt is enabled.
Suspend/Resume Register – SPRSR
• Bit 7..3 – Res: Reserved Bits
These bits are reserved and are always read as zeros.
• Bit 2 – FRWUP: Function Remote Wakeup
The USB hardware sets this bit to signal that External Interrupt 1 is detected indicating remote
wakeup. An interrupt is generated if the FRWUP IE bit of the SPRSIE register is set.
• Bit 1 – RSM: Resume
The USB hardware sets this bit when a USB resume signaling is detected at any of its port
except Port 1. An interrupt is generated if the RSM IE bit of the SPRSIE register is set.
• Bit 0 – GLB SUSP: Global Suspend
The USB hardware sets this bit when a USB global suspend signaling is detected. An interrupt
is generated if the GLBSUSP IE bit of the SPRSIE register is set.
Read/Write
Initial Value
Read/Write
Initial Value
$1FF3
$1FFA
Bit
Bit
SOF IE
R/W
R
7
–
0
7
0
EOF2 IE
R
6
–
0
R/W
6
0
R
5
–
0
5
–
R
0
R
4
–
0
R/W
4
–
0
R/W
3
–
0
HEP0 IE
R/W
3
0
FRWUP
2
R
0
FEP2 IE
R/W
2
0
RSM
1
R
0
FEP1 IE
R/W
1
0
GLB SUSP
FEP0 IE
R
0
0
1443E–USB–4/04
R/W
0
0
SPRSR
UIER