AT43USB320A-AC Atmel, AT43USB320A-AC Datasheet - Page 48

• Manufacturer Part Number: AT43USB320A-AC
• Description: IC USB MCU EMBED HUB AVR 100LQFP
• Manufacturer: Atmel
• Series: AVR®r

Specifications of AT43USB320A-AC

• Applications: USB Hub/Microcontroller
• Core Processor: AVR
• Controller Series: AT43USB
• Ram Size: 512 x 8
• Interface: SPI Serial, USB, UART
• Number Of I /o: 32
• Voltage - Supply: 4.4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Type: -

Timer/Counter1 In
PWM Mode
48
AT43USB320A
Timer/Counter1 Input Capture Register – ICR1H and ICR1L
The input capture register is a 16-bit read-only register.
When the rising or falling edge (according to the input capture edge setting - ICES1) of the sig-
nal at the input capture pin (ICP) is detected, the current value of the Timer/Counter1 is
transferred to the Input Capture Register (ICR1). At the same time, the Input Capture Flag
(ICF1) is set (one).
Since the ICR1 is a 16-bit register, a temporary register TEMP is used when ICR1 is read to
ensure that both bytes are read simultaneously. When the CPU reads the low byte ICR1L, the
data is sent to the CPU and the data of the high byte ICR1H is placed in the TEMP register.
When the CPU reads the data in the high byte ICR1H, the CPU receives the data in the TEMP
register. Consequently, the low byte ICR1L must be accessed first for a full 16-bit register read
operation.
The TEMP register is also used when accessing TCNT1, OCR1A and OCR1B. If the main pro-
gram and also interrupt routines perform access to registers using TEMP, interrupts must be
disabled during access from the main program and from interrupt routines, if interrupts are
allowed from within interrupt routines.
When the PWM mode is selected, Timer/Counter1, the Output Compare Register1A (OCR1A)
and the Output Compare Register1B (OCR1B) form a dual 8-, 9- or 10-bit, free-running, glitch-
f re e a nd p h a se co r r ec t PW M wit h o u tp u t s o n th e PD 5 (O C 1 A ) a n d O C 1 B p in s .
Timer/Counter1 acts as an up/down counter, counting up from $0000 to TOP (see Table 16),
where it turns and counts down again to zero before the cycle is repeated. When the counter
value matches the contents of the 10 least significant bits of OCR1A or OCR1B, the
PD5(OC1A)/OC1B pins are set or cleared according to the settings of the COM1A1/COM1A0
or COM1B1/COM1B0 bits in the Timer/Counter1 Control Register TCCR1A. Refer to Table 17
for details.
Table 16. Timer TOP Values and PWM Frequency
PWM Resolution
8-bit
9-bit
10-bit
Read/Write
Initial Value
$25 ($45)
$24 ($44)
Bit
MSB
15
R
R
–
7
0
0
14
R
R
–
–
6
0
0
Timer TOP value
$00FF (255)
$01FF (511)
$03FF(1023)
13
R
R
–
–
5
0
0
12
R
R
–
–
4
0
0
11
R
R
–
–
3
0
0
10
R
R
–
–
2
0
0
Frequency
f
f
f
TCK1
TCK1
TCK1
/510
/1022
/2046
R
R
9
–
–
1
0
0
LSB
8
–
0
R
R
0
0
1443E–USB–4/04
ICR1H
ICR1L