CY7C65113-SC Cypress Semiconductor Corp, CY7C65113-SC Datasheet - Page 37

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CY7C65113-SC

Manufacturer Part Number
CY7C65113-SC
Description
IC MCU 8K USB HUB 4 PORT 28-SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY7C65113-SC

Applications
USB Hub/Microcontroller
Core Processor
M8
Program Memory Type
OTP (8 kB)
Controller Series
USB Hub
Ram Size
256 x 8
Interface
I²C, USB
Number Of I /o
11
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Package Type
SOIC
Mounting
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
CY3649 - PROGRAMMER HI-LO USB M8428-1339 - KIT LOW SPEED PERSONALITY BOARD
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
428-1331

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C65113-SC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Table 17-1. Memory Allocation for Endpoints
When the SIE writes data to a FIFO, the internal data bus is driven by the SIE; not the CPU. This causes a short delay in the
CPU operation. The delay is three clock cycles per byte. For example, an 8-byte data write by the SIE to the FIFO generates a
delay of 2 s (3 cycles/byte * 83.33 ns/cycle * 8 bytes).
17.3
All USB devices are required to have a control endpoint 0 (EPA0 and EPB0) that is used to initialize and control each USB
address. Endpoint 0 provides access to the device configuration information and allows generic USB status and control accesses.
Endpoint 0 is bidirectional to both receive and transmit data. The other endpoints are unidirectional, but selectable by the user
as IN or OUT endpoints.
The endpoint mode registers are cleared during reset. When USB Status And Control Register Bits [6,7] are set to [0,0] or [1,0],
the endpoint zero EPA0 and EPB0 mode registers use the format shown in Figure 17-2.
Bits[3..0]: Mode.
Bit 4: ACK.
Bit 5: Endpoint 0 OUT Received.
Bit 6: Endpoint 0 IN Received.
Bit 7: Endpoint 0 SETUP Received.
Document #: 38-08002 Rev. *B
USB Device Endpoint Zero Mode (A0, B0)
Bit #
Bit Name
Read/Write
Reset
Label
EPB1
EPB0
EPA2
EPA1
EPA0
Two USB Addresses:
A (3 Endpoints) and
These sets the mode which control how the control endpoint responds to traffic.
This bit is set whenever the SIE engages in a transaction to the register’s endpoint that completes with an ACK packet.
1= Token received is an OUT token. 0= Token received is not an OUT token. This bit is set by the SIE to report the type of
token received by the corresponding device address is an OUT token. The bit must be cleared by firmware as part of the
USB processing.
1= Token received is an IN token. 0= Token received is not an IN token. This bit is set by the SIE to report the type of token
received by the corresponding device address is an IN token. The bit must be cleared by firmware as part of the USB
processing.
1 = Token received is a SETUP token. 0= Token received is not a SETUP token. This bit is set ONLY by the SIE to report
the type of token received by the corresponding device address is a SETUP token. Any write to this bit by the CPU will
clear it (set it to 0). The bit is forced HIGH from the start of the data packet phase of the SETUP transaction until the start
of the ACK packet returned by the SIE. The CPU should not clear this bit during this interval, and subsequently, until the
CPU first does an IORD to this endpoint 0 mode register. The bit must be cleared by firmware as part of the USB
processing.
B (2 Endpoints)
USB Control Endpoint Mode Registers
Address
0xD8
Start
0xE0
0xE8
0xF0
0xF8
[0,0]
Endpoint 0
Received
[4]
SETUP
R/W
7
0
Size
8
8
8
8
8
Endpoint 0
Received
Figure 17-2. USB Device Endpoint Zero Mode Registers
Label
EPB0
EPB1
EPA0
EPA1
EPA2
R/W
IN
6
0
USB Status And Control Register (0x1F) Bits [7, 6]
Two USB Addresses:
A (3 Endpoints) and
B (2 Endpoints)
Address
0xA8
0xB0
0xB8
0xC0
0xE0
Start
[1,0]
Endpoint 0
Received
OUT
R/W
5
0
Size
32
32
8
8
8
ACK
R/W
4
0
Label
EPA1
EPA4
EPA3
EPA2
EPA0
One USB Address:
A (5 Endpoints)
Mode Bit 3
Address
R/W
0xD8
0xE0
0xE8
Start
0xF0
0xF8
[0,1]
3
0
Mode Bit 2
Addresses 0x12(A0) and 0x42(B0)
Size
R/W
8
8
8
8
8
2
0
Label
EPA3
EPA4
EPA0
EPA1
EPA2
Mode Bit 1
One USB Address:
A (5 Endpoints)
R/W
1
0
Address
CY7C65013
CY7C65113
0xA8
0xB0
0xB8
0xC0
0xE0
Start
[1,1]
Page 37 of 51
Mode Bit 0
R/W
0
0
Size
32
32
8
8
8

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