Z8018008PSG Zilog, Z8018008PSG Datasheet - Page 21

IC 8MHZ Z180 CMOS ENH MPU 64-DIP

Z8018008PSG

Manufacturer Part Number
Z8018008PSG
Description
IC 8MHZ Z180 CMOS ENH MPU 64-DIP
Manufacturer
Zilog
Datasheet

Specifications of Z8018008PSG

Processor Type
Z180
Features
8-Bit, Enhanced Z80 Megacell
Speed
8MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
64-DIP (0.750", 19.05mm)
Processor Series
Z8018xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Number Of Timers
2
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3884
Z8018008PSG

Available stocks

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Quantity
Price
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Z8018008PSG
Manufacturer:
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Quantity:
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Part Number:
Z8018008PSG
Manufacturer:
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Quantity:
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.
PS014004-1106
Operation Modes
TXS
RXS
Z80
The Z80180 is descended from two different ancestor processors, ZiLOG's original Z80 and
the Hitachi 64180. The Operating Mode
Control Register (OMCR), illustrated in
certain Z80 and 64180 differences.
M1E (M1 Enable)—
during
When
acknowledge cycle, and the first machine cycle of the
Figure 8. Operating Control Register (OMCR: I/O Address = 3Eh)
®
versus 64180 Compatibility
M1E = 1
RESET
updated, corrupting the transmit operation in progress. Reading
transmit or receive is in progress must be avoided.
CSIO Transmit/Receive
Data Register:
TRDR (8)
CSIO Control Register:
CNTR (8)
Interrupt Request
.
, the
D7
D6 D5 —
M1
This bit controls the
Figure 7. CSIO Block Diagram
output is asserted Low during the opcode fetch cycle, the
Internal Address/Data Bus
— — — —
Figure
M1
output and is set to a
8, can be programmed to select between
Reserved
IOC (R/W)
M1TE (W)
M1E (R/W)
Baud Rate
Generator
φ
NMI
acknowledge.
1
Microprocessor Unit
CKS
TRDR
Architecture
INT0
Z80180
while a
15

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