MPC8308VMAGD Freescale Semiconductor, MPC8308VMAGD Datasheet - Page 18

MPU POWERQUICC II PRO 473MAPBGA

MPC8308VMAGD

Manufacturer Part Number
MPC8308VMAGD
Description
MPU POWERQUICC II PRO 473MAPBGA
Manufacturer
Freescale Semiconductor

Specifications of MPC8308VMAGD

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
473-MAPBGA
Product
Network Processor
Data Rate
256 bps
Frequency
400 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current (max)
5 uA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
0 C
Interface
I2C, JTAG, SPI
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Ethernet: Three-Speed Ethernet, MII Management
Figure 8
8.2.1.2
Table 24
18
At recommended operating conditions with LV
RX_CLK clock period 10 Mbps
RX_CLK clock period 100 Mbps
RX_CLK duty cycle
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise V
RX_CLK clock fall time V
Note:
1. The symbols used for timing specifications herein follow the pattern of t
for inputs and t
receive timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
(K) going to the high (H) state or setup time. Also, t
input signals (D) went invalid (X) relative to the t
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
shows the MII transmit AC timing diagram.
provides the MII receive AC timing specifications.
MII Receive AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
TXD[3:0]
TX_CLK
Parameter/Condition
TX_EN
TX_ER
IL
(min) to V
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
IH
(max) to V
IH
MRX
(max)
Table 24. MII Receive AC Timing Specifications
IL
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is
Figure 8. MII Transmit AC Timing Diagram
t
(min)
MTXH
DD
/NV
t
MTX
DD
of 3.3 V ± 0.3V.
MRX
MRDXKL
clock reference (K) going to the low (L) state or hold time. Note that, in
symbolizes MII receive timing (GR) with respect to the time data
t
t
MTKHDX
Symbol
MRXH
t
t
t
MTXF
MRDVKH
MRDXKH
t
t
t
t
MRXR
MRXF
MRX
MRX
/t
MRX
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
1
t
MTXR
10.0
10.0
Min
1.0
1.0
35
Typ
400
40
MRDVKH
Freescale Semiconductor
MRX
symbolizes MII
Max
4.0
4.0
65
clock reference
Unit
ns
ns
ns
ns
ns
ns
%

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