MPC855TVR50D4 Freescale Semiconductor, MPC855TVR50D4 Datasheet - Page 64

IC MPU POWERQUICC 50MHZ 357-PBGA

MPC855TVR50D4

Manufacturer Part Number
MPC855TVR50D4
Description
IC MPU POWERQUICC 50MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC Ir

Specifications of MPC855TVR50D4

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
8KB
Cpu Speed
50MHz
Embedded Interface Type
Ethernet, I2C, SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
357
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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CPM Electrical Characteristics
11.12 I
Table 26
1
Table 27
1
64
Num
Num
200
200
202
203
204
205
206
207
208
209
210
211
SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3 × pre_scaler × 2).
The ratio SYNCCLK/(BRGCLK/pre_scaler) must be greater than or equal to 4/1.
200
200
202
203
204
205
206
207
208
209
210
211
SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3) × pre_scaler × 2).
The ratio SYNCCLK/(BRGCLK / pre_scaler) must be greater than or equal to 4/1.
SCL clock frequency (slave)
SCL clock frequency (master)
Bus free time between transmissions
Low period of SCL
High period of SCL
Start condition setup time
Start condition hold time
Data hold time
Data setup time
SDL/SCL rise time
SDL/SCL fall time
Stop condition setup time
SCL clock frequency (slave)
SCL clock frequency (master)
Bus free time between transmissions
Low period of SCL
High period of SCL
Start condition setup time
Start condition hold time
Data hold time
Data setup time
SDL/SCL rise time
SDL/SCL fall time
Stop condition setup time
provides the I
provides the I
2
C AC Electrical Specifications
2
2
Characteristic
C (SCL < 100 kHz) timings.
C (SCL > 100 kHz) timings.
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
1
1
Table 27. . I
Characteristic
Table 26. I
2
2
C Timing (SCL < 100 kH
C Timing (SCL > 100 kH
Expression
fSCL
fSCL
BRGCLK/16512
1/2(2.2 * fSCL)
1/(2.2 * fSCL)
1/(2.2 * fSCL)
1/(2.2 * fSCL)
1/(2.2 * fSCL)
1/(2.2 * fSCL)
1/(40 * fSCL)
Z
Z
)
)
Min
0
0
All Frequencies
Min
250
1.5
4.7
4.7
4.0
4.7
4.0
4.7
All Frequencies
0
0
1/(10 * fSCL)
1/(33 * fSCL)
Freescale Semiconductor
BRGCLK/48
BRGCLK/48
Max
Max
100
100
300
1
Unit
Unit
kHz
kHz
Hz
Hz
μs
μs
μs
μs
μs
μs
ns
μs
ns
μs
s
s
s
s
s
s
s
s
s
s

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