MPC8248VRPIEA Freescale Semiconductor, MPC8248VRPIEA Datasheet - Page 3

IC MPU POWERQUICC II 516-PBGA

MPC8248VRPIEA

Manufacturer Part Number
MPC8248VRPIEA
Description
IC MPU POWERQUICC II 516-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8248VRPIEA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
300MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
300 MHz
Operating Supply Voltage
1.4 V to 1.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
4 KB
Minimum Operating Temperature
0 C
Number Of Programmable I/os
14
Program Memory Size
16 KB
Program Memory Type
EEPROM
Core Size
32 Bit
Cpu Speed
300MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
516
Rohs Compliant
Yes
For Use With
CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8248VRPIEA
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC8248VRPIEA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Figure 1
1.1
The major features of the MPC8272 are as follows:
Freescale Semiconductor
Parallel I/O
Generators
Baud Rate
Dual-issue integer (G2_LE) core
— A core version of the MPC603e microprocessor
— System core microprocessor supporting frequencies of 266-400 MHz
— Separate 16-Kbyte data and instruction caches:
— PowerPC architecture-compliant memory management unit (MMU)
— Common on-chip processor (COP) test interface
— Supports bus snooping for cache coherency
Timers
shows the block diagram of the MPC8272.
Features
G2_LE Core
FCC1
– Four-way set associative
– Physically addressed
– LRU replacement algorithm
Communication Processor Module (CPM)
FCC2
Controller
Interrupt
2 TDM Ports
32-bit RISC Microcontroller
MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 2
and Program ROM
SCC1
Instruction
RAM
4 KB
16 Kbytes
16 Kbytes
D-Cache
I-Cache
D-MMU
Time Slot Assigner
I-MMU
SCC3
16 KB
Data
RAM
Serial interface
Figure 1. Block Diagram
SCC4
2 MII/RMII
Ports
SMC1
Serial Interface
Security (SEC)1
Serial
IDMAs
Virtual
DMA
SMC2
1 8-bit Utopia
Port
2
SPI
System Interface Unit
Memory Controller
Bus Interface Unit
System Functions
Clock Counter
60x-to-PCI
Bridge
(SIU)
Non-Multiplexed
I
2
C
I/O
Note
1 MPC8272/8248 only
2 MPC8272/8271 only
USB 2.0
32 bits, up to 66 MHz
60x Bus
PCI Bus
Overview
3

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