MPC860TVR50D4 Freescale Semiconductor, MPC860TVR50D4 Datasheet - Page 67

• Manufacturer Part Number: MPC860TVR50D4
• Description: IC MPU POWERQUICC 50MHZ 357PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC Ir

Specifications of MPC860TVR50D4

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 8KB
• Cpu Speed: 50MHz
• Embedded Interface Type: Ethernet, I2C, SPI, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 357
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13 FEC Electrical Characteristics
This section provides the AC electrical specifications for the Fast Ethernet controller (FEC). Note that the
timing specifications for the MII signals are independent of system clock frequency (part speed
designation). Also, MII signals use TTL signal levels compatible with devices operating at either 5.0 V or
3.3 V.
13.1
The receiver functions correctly up to a MII_RX_CLK maximum frequency of 25 MHz + 1%. There is no
minimum frequency requirement. In addition, the processor clock frequency must exceed the
MII_RX_CLK frequency – 1%.
Table 29
Figure 72
Freescale Semiconductor
Num
M1
M2
M3
M4
MII_RXD[3:0], MII_RX_DV, MII_RX_ER to MII_RX_CLK setup
MII_RX_CLK to MII_RXD[3:0], MII_RX_DV, MII_RX_ER hold
MII_RX_CLK pulse width high
MII_RX_CLK pulse width low
provides information on the MII receive signal timing.
MII Receive Signal Timing (MII_RXD[3:0], MII_RX_DV, MII_RX_ER,
MII_RX_CLK)
MII_RXD[3:0] (Inputs)
shows MII receive signal timing.
MII_RX_CLK (Input)
MII_RX_ER
MII_RX_DV
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
Figure 72. MII Receive Signal Timing Diagram
Characteristic
Table 29. MII Receive Signal Timing
M1
M2
M3
M4
35%
35%
Min
5
5
FEC Electrical Characteristics
Max
65%
65%
—
—
MII_RX_CLK
MII_RX_CLK
period
period
Unit
ns
ns
67