MPC8250AVVPIBC Freescale Semiconductor, MPC8250AVVPIBC Datasheet - Page 19

IC MPU POWERQUICC II 480-TBGA

MPC8250AVVPIBC

Manufacturer Part Number
MPC8250AVVPIBC
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8250AVVPIBC

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
300 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MPC82XX
Device Core
PowerQUICC II
Device Core Size
32b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
2.2V
Operating Supply Voltage (min)
1.9V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
480
Package Type
TBGA
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
For Use With
CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8250AVVPIBC
Manufacturer:
Freescale
Quantity:
43
Part Number:
MPC8250AVVPIBC
Manufacturer:
MOTOLOLA
Quantity:
885
Part Number:
MPC8250AVVPIBC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Figure 11
Figure 12
Freescale Semiconductor
shows signal behavior in MEMC mode.
is a graphical representation of
Generally, all MPC8250 bus and system output signals are driven from the
rising edge of the input clock (CLKin). Memory controller signals,
however, trigger on four points within a CLKin cycle. Each cycle is divided
by four internal ticks: T1, T2, T3, and T4. T1 always occurs at the rising
edge, and T3 at the falling edge, of CLKin. However, the spacing of T2 and
T4 depends on the PLL clock ratio selected, as shown in
Memory controller signals
1:2, 1:3, 1:4, 1:5, 1:6
CLKin
CLKin
CLKin
PLL Clock Ratio
Figure 12. Internal Tick Spacing for Memory Controller Signals
1:2.5
1:3.5
T1
T1
T1
Table 11. Tick Spacing for Memory Controller Signals
CLKin
V_CLK
T2
MPC8250 Hardware Specifications, Rev. 2
T2
T2
Figure 11. MEMC Mode Diagram
1/4 CLKin
3/10 CLKin
4/14 CLKin
Tick Spacing (T1 Occurs at the Rising Edge of CLKin)
Table
T3
T3
T3
T2
11.
NOTE
T4
T4
T4
1/2 CLKin
1/2 CLKin
1/2 CLKin
sp34/sp30
T3
for 1:2, 1:3, 1:4, 1:5, 1:6
for 1:2.5
for 1:3.5
Table
3/4 CLKin
8/10 CLKin
11/14 CLKin
Electrical and Thermal Characteristics
11.
T4
19

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