MPC8260AZUPJDB Freescale Semiconductor, MPC8260AZUPJDB Datasheet - Page 17

IC MPU POWERQUICC II 480-TBGA

MPC8260AZUPJDB

Manufacturer Part Number
MPC8260AZUPJDB
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8260AZUPJDB

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
300MHz
Embedded Interface Type
I2C, MII, SPI, TDM, UTOPIA
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
No
For Use With
MPC8260ADS-TCOM - BOARD DEV ADS POWERQUICC II
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Figure 6
Figure 7
Freescale Semiconductor
MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0
shows the SCC/SMC/SPI/I
shows TDM input and output signals.
SCC/SMC/SPI/I2C output signals
SCC/SMC/SPI/I2C input signals
(See note.)
(See note.)
Note: There are four possible TDM timing conditions:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
TDM output signals
Note: There are four possible timing conditions for SCC and SPI:
TDM input signals
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.
Serial CLKin
Figure 6. SCC/SMC/SPI/I
BRG_OUT
2
C internal clock.
Figure 7. TDM Signal Diagram
sp18a
sp20
2
C Internal Clock Diagram
sp40/sp41
sp21
sp19a
sp38a/sp39a
Electrical and Thermal Characteristics
17

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