IDT79RC32V332-133DHI IDT, Integrated Device Technology Inc, IDT79RC32V332-133DHI Datasheet - Page 13

• Manufacturer Part Number: IDT79RC32V332-133DHI
• Description: IC PROC 32BIT CPU 133MHZ 208-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32V332-133DHI

• Processor Type: RISC 32-Bit
• Speed: 133MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 79RC32V332-133DHI

IDT 79RC32332
pci_host_mode Settings
must configure the RC32332’s PCI configuration registers, including the read-only registers. If the RC32332’s PCI is in the PCI-boot mode Satellite
mode, read-only configuration registers are loaded by the serial EEPROM.
Clock Parameters — RC32332
During cold reset initialization, the RC32332’s PCI interface can be set to the Satellite or Host mode settings. When set to the Host mode, the CPU
Ta Commercial = 0°C to +70°C; Ta Industrial = -40°C to +85°C
3.3V version: V
2.5V version: V
cpu_masterclock HIGH
cpu_masterclock LOW
cpu_masterclock period
cpu_masterclock period
cpu_masterclock Rise & Fall Time
cpu_masterclock Jitter
pci_clk Rise & Fall Time
pci_clk Period
jtag_tck Rise & Fall Time
ejtag_dck period
jtag_tck clock period
ejtag_dclk High, Low Time
ejtag_dclk Rise, Fall Time
output_clk
cpu_coldreset_n
Asserted during power-up
cpu_coldreset_n Rise Time
1.
2.
3.
Refer to the RC32334/RC32332 Device Errata for more information.
cpu_masterclock frequency should never be below pci_clk frequency if PCI interface is used.
Rise and Fall times are measured between 10% and 90%.
Output_clk should not be used in a system. Only the cpu_masterclock or its derivative must be used to drive all the subsystems with designs based on the RC32334/RC32332.
mem_addr[20]
Parameter
3
Pin
1
cc
cc
Core = +3.3V±5%; V
Core = +2.5V±5%; V
1
1
- 3.3V ver.
- 2.5V ver. t
Reset Boot Mode
PCI host mode
2
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
MCHIGH
MCLOW
MCP
MCP
MCRise,
JITTER
PCRise,
PCP
JCRise,
DCK,
TCK,
DCK High,
DCK Low,
DCK Rise,
DCK Fall,
DO
CRRise
Symbol
21
cc
cc
t
t
3
11
I/O = +3.3V±5%
I/O = +3.3V±5%
t
t
t
JCFall
PCFall
MCFall
t
t
t
10
t
10
Table 4 RC32332 pci_host_mode Initialization Settings
9
9
PCI is in host mode (typical system)
PCI is in satellite mode
Transition ≤ 2ns
Transition ≤ 2ns
—
—
—
—
PCI 2.2
—
power-on sequence
Test Conditions
Table 5 Clock Parameters - RC32332
13 of 30
Description
Min
100
N/A
120
20
20
20
10
RC32332
—
—
—
—
—
—
8
8
4
100MHz
+ 250
Max
66.6
40.0
N/A
1.6
—
—
—
—
—
—
—
3
5
1
5
6.75
6.75
Min
100
N/A
120
RC32332
15
15
20
10
—
—
—
—
—
—
4
133MHz
Value
+ 250
Max
66.6
40.0
N/A
1.6
—
—
—
—
—
—
—
3
5
1
5
1
0
13.33
13.33
Mode Settings
PCI_satellite
PCI_host
Min
100
N/A
120
20
10
RC32332
—
—
—
—
—
—
6
6
4
150MHz
+ 200
Max
66.6
40.0
N/A
1.6
—
—
—
—
—
—
—
3
5
1
5
May 4, 2004
Units
ms
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
—