MPC880ZP66 Freescale Semiconductor, MPC880ZP66 Datasheet - Page 85

IC MPU POWERQUICC 66MHZ 357PBGA

MPC880ZP66

Manufacturer Part Number
MPC880ZP66
Description
IC MPU POWERQUICC 66MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC880ZP66

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
66MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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17 Document Revision History
Table 40
Freescale Semiconductor
Revision
Number
3.0
2.0
1.0
0.9
0.8
0.7
0.6
0.5
7
6
5
4
lists significant changes between revisions of this hardware specification.
7/22/2004
07/2010
05/2010
03/2009
08/2007
12/2003
9/2003
8/2003
8/2003
7/2003
6/2003
5/2003
Date
In
Added minimum load for CLKOUT in
Updated formatting of
“Reset
Changed the USB description to full-/low-speed compatible.
Added the Reference to USB 2.0 to the Features list and removed 1.1 from USB on the block
diagrams.
Added the RxClav and TxClav signals to PC15.
Changed the pin descriptions per the June 22 spec.
Changed some more typos, put in the phsel and phreq pins. Corrected the USB timing.
• Updated TRLX condition value for B22a/b/c to “TRLX = [0 or 1]”
• Removed TRLX condition for B23
• Updated condition and equation for B30 to “Invalid GPCM read/write access
• Updated note 8 to “The timing B30 refers to CS when ACS = 00 and to CS and WE(0:3) when
• On page 1, updated first paragraph and added a second paragraph.
• After Table 2, inserted a new figure showing the undershoot/overshoot voltage
• In
• In
• In
• In
• Added sentence to Spec B1A about EXTCLK and CLKOUT being in Alignment for Integer Values
• Added a footnote to Spec 41 specifying that EDM = 1
• Added RMII1_EN under M1II_EN in Table 36 Pin Assignments
• Added a tablefootnote to Table 6 DC Electrical Specifications about meeting the VIL Max of the
• Put the new part numbers in the Ordering Information Section
• Changed the maximum operating frequency to 133 MHz.
• Put in the orderable part numbers that are orderable.
• Put the timing in the 80 MHz column.
• Rounded the timings to hundredths in the 80 MHz column.
• Put the pin numbers in footnotes by the maximum currents in Table 6.
• Changed 22 and 41 in the Timing.
• Put in the Thermal numbers.
• Added the DSP information in the Features list
• Fixed table formatting.
• Nontechnical edits.
• Released to the external web.
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
Table 9,
(MIN = 0.25 × B1 – 2.00)”
CSNT = 0.”
renumbered the rest of the figures.
to bus operation up to 50 MHz.
I2C Standard
Table
Figure
Table
Figure
Timing,” and
“Bus Operation Timings,” changed the following:
9, for reset timings B29f and B29g added footnote indicating that the formula only applies
18, changed num 46 description to read, “TA assertion to rising edge ...”
6, changed all reference voltage measurement points from 0.2 and 0.8 V to 50% level.
49, changed TA to reflect the rising edge of the clock.
Table 40. Document Revision History
Table 15, “JTAG
Table 12
,
“PCMCIA Port Timing,” Table 13, “Debug Port
Timing.”
Section 10, “Bus Signal
Changes
Timing.”
Document Revision History
Timing,”
(Figure
Table 14,
3) and
85

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