MPC603RRX200LC Freescale Semiconductor, MPC603RRX200LC Datasheet
MPC603RRX200LC
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... Freescale Semiconductor, Inc. Semiconductor Products Sector Technical Data PowerPC 603e RISC Microprocessor Family: ª PID7t-603e Hardware SpeciÞcations The PowerPC 603eª microprocessor is an implementation of the PowerPC family of reduced instruction set computing (RISC) microprocessors. In this document, the term Ô603eÕ is used as an abbreviation for the PowerPC 603e microprocessor ...
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... Freescale Semiconductor, Inc. Overview This document describes the pertinent physical characteristics of the PID7t-603e from Motorola. For functional characteristics of the 603e, refer to the PowerPC 603e RISC Microprocessor UserÕs Manual . This document contains the following topics: Topic Section 1.1, ÒOverviewÓ Section 1.2, ÒFeaturesÓ ...
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... Freescale Semiconductor, Inc. supports block address translation through the use of two independent instruction and data block address translation (IBAT and DBAT) arrays of four entries each. Effective addresses are compared simultaneously with all four entries in the BAT array during block translation. In accordance with the PowerPC architecture effective address hits in both the TLB and BAT array, the BAT translation takes priority ...
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... Freescale Semiconductor, Inc. General Parameters Ñ 16-Kbyte instruction cacheÑfour-way set-associative, physically addressed; LRU replacement algorithm Ñ Cache write-back or write-through operation programmable on a per page or per block basis Ñ BPU that performs CR lookahead operations Ñ Address translation facilities for 4-Kbyte page size, variable block size, and 256-Mbyte segment size Ñ ...
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... Freescale Semiconductor, Inc. 1.4 Electrical and Thermal Characteristics This section provides the AC and DC electrical speciÞcations and thermal characteristics for the PID7t-603e. 1.4.1 DC Electrical Characteristics The tables in this section describe the PID7t-603e DC electrical characteristics. Table 2 provides the absolute maximum ratings. Table 2. Absolute Maximum Ratings ...
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... Freescale Semiconductor, Inc. Electrical and Thermal Characteristics Table 4 provides the package thermal characteristics for the PID7t-603e. Table 4. Package Thermal Characteristics Characteristic Package die junction-to-case thermal resistance (typical) Package die junction-to-ball thermal resistance (typical) Note: Refer to Section 1.8, “System Design Information,” for more details about thermal management. ...
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... Freescale Semiconductor, Inc. Table 6 provides the power consumption for the PID7t-603e. 100 MHz Full-On Mode (DPM Enabled) Typical 1.1 Maximum 1.6 Doze Mode Typical 0.55 Nap Mode Typical 50 Sleep Mode Typical 45 Sleep ModeÑPLL Disabled Typical 40 Sleep ModeÑPLL and SYSCLK Disabled ...
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... Freescale Semiconductor, Inc. Electrical and Thermal Characteristics 1.4.2.1 Clock AC SpeciÞcations Table 7 provides the clock AC timing speciÞcations as deÞned in Figure 1. After fabrication, parts are sorted by maximum processor core frequency as shown in Section 1.4.2.1, ÒClock AC SpeciÞcations,Ó and tested for conformance to the AC speciÞcations for that frequency. Parts are sold by maximum processor core frequency ...
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... Freescale Semiconductor, Inc. Figure 1 provides the SYSCLK input timing diagram SYSCLK 1.4.2.2 Input AC SpeciÞcations Table 8 provides the input AC timing speciÞcations for the PID7t-603e as deÞned in Figure 2 and Figure 3. Vdd = AVdd = 2.5 ± dc, OVdd = 3.3 ± dc, GND = £ Tj £ 105° C ...
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... Freescale Semiconductor, Inc. Electrical and Thermal Characteristics Figure 2 provides the input timing diagram for the PID7t-603e VM SYSCLK 10a 10b ALL INPUTS Figure 3 provides the mode select input timing diagram for the PID7t-603e. HRESET 10c MODE PINS Figure 3. Mode Select Input Timing Diagram 1.4.2.3 Output AC SpeciÞ ...
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... Freescale Semiconductor, Inc. Table 9. Output AC Timing Specifications Vdd = AVdd = 2.5 ± dc, OVdd = 3.3 ± 5%, GND = 0 V dc, 0 £ Tj £ 105 ° (unless otherwise noted) Num Characteristic 14b SYSCLK to output valid (all except TS, ABB, ARTRY, DBB) 15 SYSCLK to output invalid (output hold) 16 SYSCLK to output high impedance (all except ...
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... Freescale Semiconductor, Inc. Electrical and Thermal Characteristics Figure 4 provides the output timing diagram for the PID7t-603e. VM SYSCLK 14 12 ALL OUTPUTS (Except TS, ABB, DBB, ARTRY ABB, DBB ARTRY 12 PID7t-603e Hardware Specifications For More Information On This Product Midpoint Voltage (1.4 V) Figure 4. Output Timing Diagram Go to: www ...
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... Freescale Semiconductor, Inc. 1.4.3 JTAG AC Timing SpeciÞcations Table 10 provides the JTAG AC timing speciÞcations as deÞned in Figure 5, Figure 6, Figure 7 and Figure 8. Table 10. JTAG AC Timing Specifications Vdd = AVdd = 2.5 ± dc, OVdd = 3.3 ± 5%, GND = 0 V dc, 0 £ Tj £ 105° Num ...
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... Freescale Semiconductor, Inc. Electrical and Thermal Characteristics Figure 6 provides the TRST timing diagram TCK TRST Figure 7 provides the boundary-scan timing diagram. TCK Data Inputs Data Outputs Data Outputs Data Outputs Figure 7. Boundary-Scan Timing Diagram Figure 8 provides the test access port timing diagram. ...
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... Freescale Semiconductor, Inc. 1.5 Pin Assignments art A of Figure 9 shows the pinout of the CBGA package as viewed from the top surface. Part B P shows the side profile of the CBGA package to indicate the direction of the top surface view. The PBGA package has an identical pinout. Part C shows the side profile of the PBGA package to indicate the direction of the top surface view ...
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... Freescale Semiconductor, Inc. Pinout Listings Part C Substrate Assembly Mold Compound Figure 9. Pinout of the CBGA & PBGA Packages as Viewed from the Top Surface 1.6 Pinout Listings Table 11 provides the pinout listing for the 603e CBGA and PBGA packages. Table 11. Pinout Listing for the 255-Pin CBGA and PBGA Packages Signal Name A[0– ...
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... Freescale Semiconductor, Inc. Table 11. Pinout Listing for the 255-Pin CBGA and PBGA Packages Signal Name DH[0–31] P14, T16, R15, T15, R13, R12, P11, N11, R11,T12, T11, R10, P09, N09, T10, R09, T09, P08, N08, R08, T08, N07, R07, T07, P06, N06, R06, T06, R05, N05, T05, T04 DL[0– ...
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... Freescale Semiconductor, Inc. Package Descriptions Table 11. Pinout Listing for the 255-Pin CBGA and PBGA Packages Signal Name TDI A11 TDO A12 TEA H13 TLBISYNC C04 TMS B11 TRST C10 TS J13 TSIZ[0–2] A13, D10, B12 TT[0–4] B13, A15, B16, C14, C15 ...
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... Freescale Semiconductor, Inc. 1.7.1.2 Mechanical Dimensions of the CBGA Package Figure 10 provides the mechanical dimensions and bottom surface nomenclature of the CBGA package CORNER B 2X 0.200 N Ð F Ð 255X T 0.300 S T 0.150 S Figure 10. Mechanical Dimensions and Bottom Surface Nomenclature of the CBGA Package PID7t-603e Hardware Specifications ...
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... Freescale Semiconductor, Inc. Package Descriptions 1.7.2 PBGA Package Description The following sections provide the package parameters and mechanical dimensions for the PBGA package. 1.7.2.1 Package Parameters The package parameters are as provided in the following list. The package type mm, 255-lead plastic ball grid array (PBGA). ...
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... Freescale Semiconductor, Inc. 1.7.2.2 Mechanical Dimensions of the PBGA Package Figure 11 shows the non-JEDEC package mechanical dimensions and bottom surface nomenclature of the the PBGA package. A 0.20 C 256X 0. 0. SEATING PLANE SIDE VIEW e 15X (E1 Figure 11. Package Dimensions for the Plastic Ball Grid Array (PBGA)Ñnon-JEDEC Standard Note that Table 11 lists the pinout to this non-JEDEC standard in order to be consistent with the CBGA pinout ...
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... Freescale Semiconductor, Inc. Package Descriptions Figure 12 shows the JEDEC package dimensions of the PBGA package. A 0.20 C 256X 0. 0. SEATING PLANE SIDE VIEW e 15X (E1 Figure 12. Package Dimensions for the Plastic Ball Grid Array (PBGA)ÑJEDEC Standard Note that the pin numberings shown in Figure 12 do not match Table 11 and the pinout of the non-JEDEC standard package (and the CBGA pinout) shown in Figure 11 ...
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... Freescale Semiconductor, Inc. 1.8 System Design Information This section provides electrical and thermal design recommendations for successful application of the 603e. 1.8.1 PLL ConÞguration The 603e PLL is conÞgured by the PLL_CFG[0Ð3] signals. For a given SYSCLK (bus) frequency, the PLL conÞguration signals set the internal CPU and VCO frequency of operation. The PLL conÞguration for the PID7t-603e is shown in Table 12 for nominal frequencies ...
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... Freescale Semiconductor, Inc. System Design Information 1.8.2 PLL Power Supply Filtering The AVdd power signal is provided on the 603e to provide power to the clock generation phase-locked loop. To ensure stability of the internal clock, the power supplied to the AVdd input signal should be Þltered using a circuit similar to the one shown in Figure 13. The circuit should be placed as close as possible to the AVdd pin to ensure it Þ ...
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... Freescale Semiconductor, Inc. 1.8.5 Pull-up Resistor Requirements The 603e requires high-resistive (weak: 10 KW) pull-up resistors on several control signals of the bus interface to maintain the control signals in the negated state after they have been actively negated and released by the 603e or other bus master. These signals areÑTS, ABB, DBB, and ARTRY. ...
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... Freescale Semiconductor, Inc. System Design Information Figure 14. Typical Die Junction-to-Ambient Thermal Resistance (21 mm CBGA and 23 mm WB-PBGA) To reduce the die-junction temperature, heat sinks may be attached to the package by several methodsÑadhesive, spring clip to holes in the printed-circuit board or package, and mounting clip and screw assembly (both CBGA and PGBA packages) ...
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... Freescale Semiconductor, Inc. Heat Sink Heat Sink Clip Adhesive or Thermal Interface Material Printed-Circuit Board Heat Sink Heat Sink Clip Adhesive or Thermal Interface Material Printed-Circuit Board Figure 15. Package Exploded Cross-Sectional View with Heat Sink PID7t-603e Hardware Specifications For More Information On This Product, Go to: www ...
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... Freescale Semiconductor, Inc. System Design Information The board designer can choose between several types of heat sinks to place on the 603e. There are several commercially-available heat sinks for the 603e provided by the following vendors: Chip Coolers Inc. 333 Strawberry Field Rd. Warwick, RI 02887-6979 Internet: www.chipcoolers.com International Electronic Research Corporation (IERC)818-842-7277 135 W ...
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... Freescale Semiconductor, Inc. External Resistance Internal Resistance Printed-Circuit Board External Resistance (Note the internal versus external package resistance) Figure 16. Package with Heat Sink Mounted to a Printed-Circuit Board 1.8.6.2 Thermal Interface Materials A thermal interface material is recommended at the package lid-to-heat sink interface to minimize the thermal contact resistance ...
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... Freescale Semiconductor, Inc. System Design Information 2 1 Figure 17. Thermal Performance of Select Thermal Interface Material The board designer can choose between several types of thermal interface. Heat sink adhesive materials should be selected based upon high conductivity, yet adequate mechanical strength to meet equipment shock/vibration requirements ...
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... Freescale Semiconductor, Inc. Loctite Corporation 1001 Trout Brook Crossing Rocky Hill, CT 06067-3910 Internet: www.loctite.com 1.8.6.3 Heat Sink Selection Example For preliminary heat sink sizing, the die-junction temperature can be expressed as follows int Where the die-junction temperature the inlet cabinet ambient temperature the air temperature rise within the computer cabinet ...
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... Freescale Semiconductor, Inc. System Design Information 0.5 Figure 18. Thermalloy #2328B Heat Sink-to-Ambient Thermal Resistance Versus Airflow Velocity Assuming an air velocity of 0.5 m/s, we have an effective 30¡C + 5¡C + (0.095 ¡C/W +1.0 ¡C ¡C/ resulting in a die-junction temperature of approximately 60 ¡C which is well within the maximum operating temperature of the component ...
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... Freescale Semiconductor, Inc. design and its operating conditions. In addition to the component's power consumption, a number of factors affect the Þnal operating die-junction temperatureÑairßow, board population (local heat ßux of adjacent components), heat sink efÞciency, heat sink attach, heat sink placement, next-level interconnect technology, system air temperature rise, altitude, etc ...
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... Freescale Semiconductor, Inc. Ordering Information 34 PID7t-603e Hardware Specifications For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. PID7t-603e Hardware Specifications For More Information On This Product, Go to: www.freescale.com Ordering Information 35 ...
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... Freescale Semiconductor, Inc. DigitalDNA and Mfax are trademarks of Motorola, Inc. The PowerPC name, the PowerPC logotype, and PowerPC 603e are trademarks of International Business Machines Corporation used by Motorola under license from International Business Machines Corporation. Information in this document is provided solely to enable system and software implementers to use PowerPC microprocessors. There are no express or implied copyright licenses granted hereunder to design or fabricate PowerPC integrated circuits or integrated circuits based on the information in this document ...