MPC8347EVVAJDB Freescale Semiconductor, MPC8347EVVAJDB Datasheet - Page 2

• Manufacturer Part Number: MPC8347EVVAJDB
• Description: IC MPU PWRQUICC II 672-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8347EVVAJDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 533MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 672-TBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 533MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 672
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Overview
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This section provides a high-level overview of the MPC8347E features.
functional units within the MPC8347E.
Major features of the MPC8347E are as follows:
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•
•
Overview
Embedded PowerPC e300 processor core; operates at up to 667 MHz
— High-performance, superscalar processor core
— Floating-point, integer, load/store, system register, and branch processing units
— 32-Kbyte instruction cache, 32-Kbyte data cache
— Lockable portion of L1 cache
— Dynamic power management
— Software-compatible with the other Freescale processor families that implement Power
Double data rate, DDR SDRAM memory controller
— Programmable timing for DDR-1 SDRAM
— 32- or 64-bit data interface, up to 333-MHz data rate for TBGA, 266 MHz for PBGA
— Four banks of memory, each up to 1 Gbyte
— DRAM chip configurations from 64 Mbit to 1 Gbit with x8/x16 data ports
— Full error checking and correction (ECC) support
— Page mode support (up to 16 simultaneous open pages)
— Contiguous or discontiguous memory mapping
— Read-modify-write support
— Sleep mode for self-refresh SDRAM
— Auto refresh
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Architecture technology
Security
Dual
Role
High-Speed
USB 2.0
Host
Dual I
DUART
Timers
GPIO
2
C
10/100/1000
Ethernet
Figure 1. MPC8347E Block Diagram
Controller
Interrupt
10/100/1000
D-Cache
Ethernet
32KB
e300 Core
I-Cache
32KB
PCI
Local Bus
Figure 1
SEQ
shows the major
Controller
SDRAM
Freescale Semiconductor
DDR
DMA