MPC8245LZU333D Freescale Semiconductor, MPC8245LZU333D Datasheet - Page 56

• Manufacturer Part Number: MPC8245LZU333D
• Description: IC MPU 32BIT 333MHZ 352-TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIr

Specifications of MPC8245LZU333D

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 333MHz
• Voltage: 2V
• Mounting Type: Surface Mount
• Package / Case: 352-TBGA
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 333MHz
• Embedded Interface Type: I2C
• Digital Ic Case Style: TBGA
• No. Of Pins: 352
• Supply Voltage Range: 1.9V To 2.2V
• Rohs Compliant: No
• Family Name: MPC82XX
• Device Core: PowerPC
• Device Core Size: 64b
• Frequency (max): 333MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 2/2.1/3.3V
• Operating Supply Voltage (max): 2.2/3.465V
• Operating Supply Voltage (min): 1.9/3.135V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 352
• Package Type: TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Document Revision History
8
Table 19
56
Revision
6.1
5.1
10
9
8
7
6
Document Revision History
provides a revision history for this hardware specification.
10/07/2004 Section 4.1.2—Table 2: Corrected range of AV
05/24/2004 Section 4.5.3—Table 11: Spec 12b was improved from 4.5 ns to 4.0 ns. This improvement is
11/15/2005 Document—Imported new template and made minor editorial changes.
05/11/2004 Section 4.1.2—Table 2: Corrected range of GV
12/27/05
Date
8/07
—
Section
to the chosen nominal does not exceed ± 100 mV.
Completely replaced
processor devices.
Document—Added Power Architecture information.
Section
nominal voltage listings in
Section
Updated back page information.
Removed references to a 466 MHz part since it is not available for new orders.
Section 4.3.2—Added paragraph for using DLL mode that provides lowest locked tap point read in
0xE3.
Section 5.3—Updated the driver and I/O assignment information for the multiplexed PCI clock and
DUART signals. Added note for HRST_CPU and HRST_CTRL, which had been mentioned only in
Figure
Section 9.2—Updated the part ordering specifications for the extended temperature parts. Also
updated the section to reflect what we offer for new orders.
Section 9.3—Added new section, “Part Marking.” Updated Figure 33 to match with current part
marking format.
Section 9.1—Table
guaranteed on devices marked after work week (WW) 28 of 2004. A device's work week may be
determined from the “YYWW” portion of the devices trace ability code which is marked on the top of
the device. So for WW28 in 2004, the device’s YYWW is marked as 0428. For more information refer
to Figure 33
Section 4.2.1—Table 4: Changed the default for drive strength of DRV_STD_MEM.
Section 4.5.1—Table 8: Changed the wording description for item 15.
Section 4.5.2—Table 10: Changed T
SDRAM_SYNC_IN description relative to T
Section 4.5.3—Table 11: Changed timing specification for sys_logic_clk to output valid (memory
control, address, and data signals).
Section 4.3.1—Table 9: Corrected last row to state the correct description for the bit setting. Max tap
delay, DLL extend. Figure 8: Corrected the label name for the DLL graph to state “DLL Locking Range
Loop Delay vs. Frequency of Operation for DLL_Extend=1 and Normal Tap Delay”
MPC8245 Integrated Processor Hardware Specifications, Rev. 10
2.
3,
4.1—Changed increased absolute maximum range for V
9.2—Removed Note 3 from
Table
3, and
Table 19. Revision History Table
21:
Section 4.6
Table
Corrected voltage range under Process Descriptor column. Minor reformatting.
Table
7—Changed format of recommended voltage supply values so that delta
2.
with compliant I
Table
os
Substantive Change(s)
range and wording in note; Figure 11:changed wording for
21.
OS
.
DD
DD
2
and AVDD
C specifications as with other related integrated
to 3.3 ± 5%.
2
.
DD
in
Table
Freescale Semiconductor
1. Updated format of