MC7457VG1267LC Freescale Semiconductor, MC7457VG1267LC Datasheet - Page 51

• Manufacturer Part Number: MC7457VG1267LC
• Description: IC MPU RISC 1267MHZ 483FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC7457VG1267LC

• Processor Type: MPC74xx PowerPC 32-Bit
• Speed: 1.267GHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 483-FCCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

9.1.2
The MPC7457 generates the clock for the external L3 synchronous data SRAMs by dividing the core clock
frequency of the MPC7457. The core-to-L3 frequency divisor for the L3 PLL is selected through the
L3_CLK bits of the L3CR register. Generally, the divisor must be chosen according to the frequency
supported by the external RAMs, the frequency of the MPC7457 core, and timing analysis of the circuit
board routing.
of core frequencies.
Freescale Semiconductor
Frequency
Notes:
1. PLL_CFG[0:4] settings not listed are reserved.
2. The sample bus-to-core frequencies shown are for reference only. Some PLL configurations may select bus, core, or VCO
3. In PLL-bypass mode, the SYSCLK input signal clocks the internal processor directly and the PLL is disabled. However,
4. In PLL-off mode, no clocking occurs inside the MPC7455 regardless of the SYSCLK input.
PLL_CFG[0:4]
(MHz)
frequencies which are not useful, not supported, or not tested for by the MPC7455; see
Specifications,”
the bus interface unit requires a 2x clock to function. Therefore, an additional signal, EXT_QUAL, must be driven at
one-half the frequency of SYSCLK and offset in phase to meet the required input setup t
Table
SYSCLK frequency. This mode is intended for factory use and emulator tool use only.
Note: The AC timing specifications given in this document do not apply in PLL-bypass mode.
Core
1000
500
533
550
600
650
666
700
733
800
866
933
Table 18. MPC7457 Microprocessor PLL Configuration Example for 1267 MHz Parts (continued)
11110
2
9). The result is that the processor bus frequency is one-half SYSCLK while the internal processor is clocked at
L3 Clocks
250
266
275
300
325
333
350
367
400
433
467
500
÷2
Table 19
for valid SYSCLK, core, and VCO frequencies.
Multiplier
Bus-to-
Core
÷2.5
200
213
220
240
260
266
280
293
320
347
373
400
shows various example L3 clock frequencies that can be obtained for a given set
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7
PLL off
167
178
183
200
217
222
233
244
266
289
311
333
Multiplier
÷3
Core-to-
VCO
Table 19. Sample Core-to-L3 Frequencies
÷3.5
143
152
157
171
186
190
200
209
230
248
266
285
MHz
33.3
Example Bus-to-Core Frequency in MHz (VCO Frequency in MHz)
125
133
138
150
163
167
175
183
200
217
233
250
÷4
MHz
50
÷4.5
111
118
122
133
144
148
156
163
178
192
207
222
PLL off, no core clocking occurs
MHz
100
107
110
120
130
133
140
147
160
173
187
200
66.6
÷5
Bus (SYSCLK) Frequency
÷5.5
100
109
118
121
127
133
145
157
170
182
91
97
MHz
75
100
108
111
117
122
133
145
156
166
÷6
83
89
92
1
MHz
83
Section 5.2.1, “Clock AC
IVKH
÷6.5
100
102
108
113
123
133
144
154
77
82
85
92
and hold time t
MHz
100
System Design Information
100
105
114
124
133
143
÷7
71
76
79
86
93
95
MHz
133
÷7.5
107
115
124
133
IXKH
67
71
73
80
87
89
93
98
(see
MHz
167
100
108
117
125
÷8
63
67
69
75
81
83
88
92
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