MC68360RC25K Freescale Semiconductor, MC68360RC25K Datasheet - Page 471

• Manufacturer Part Number: MC68360RC25K
• Description: IC MPU QUICC 25MHZ 241-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360RC25K

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 241-PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Freescale Semiconductor, Inc.
Serial Communication Controllers (SCCs)
7.10.16.5 UART PROGRAMMING MODEL. An SCC configured as a UART uses the same
data structure as in the other modes. The UART data structure supports multibuffer opera-
tion. The UART may be programmed to perform address comparison whereby messages
not destined for a given programmable address are discarded. Also, the user can program
the UART to accept or reject control characters. If a control character is rejected, an interrupt
may be generated. The receive character may be accepted using a receive character mask
value. The UART enables the user to transmit break and preamble sequences. Overrun,
parity, noise, and framing errors are reported via the BD table and/or error counters. An indi-
cation of the status of the line (idle) is reported through the status register, and a maskable
interrupt is generated upon a status change. In its simplest form, the UART can function in
a character-oriented environment. Each character is transmitted with accompanied stop bits
and parity (as configured by the user) and received into separate 1-byte buffers. Reception
of each buffer may generate a maskable interrupt.
Many applications may want to take advantage of the message-oriented capabilities sup-
ported by the UART by using linked buffers (in either receive or transmit). In this case, data
is handled in a message-oriented environment; users can work on entire messages rather
than operating on a character-by-character basis. A message may span several linked buff-
ers. For example, before handling the input data, a terminal driver may wish to wait until an
end-of-line character has been typed by the user rather than being interrupted upon the
reception of each character.
As another example, when transmitting ASCII files, the data may be transferred as mes-
sages ending on the end-of-line character. Each message could be both transmitted and
received as a linked list of buffers without any intervention from the CPU32+, which achieves
ease in programming and significant savings in processor overhead.
On the receive side, the user may define up to eight control characters. Each control char-
acter may be configured to designate the end of a message or generate a maskable inter-
rupt without being stored in the data buffer. The latter option is useful when flow control
characters such as XON or XOFF need to alert the CPU32+, yet do not belong to the mes-
sage being received.
7.10.16.6 UART COMMAND SET. The following transmit and receive commands are
issued to the CR.
7.10.16.6.1 Transmit Commands. The following paragraphs describe the UART transmit
commands.
STOP TRANSMIT Command . After a hardware or software reset and the enabling of the
channel in the SCC mode register, the channel is in the transmit enable mode and starts
polling the first BD in the table every 8 transmit clocks (immediately if the TOD bit in the
TODR is set).
The STOP TRANSMIT command disables the transmission of characters on the transmit
channel. If this command is received by the UART controller during message transmission,
transmission of that message is aborted. The UART completes transmission of all data
MC68360 USER’S MANUAL
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