MPC8349CZUAJFB Freescale Semiconductor, MPC8349CZUAJFB Datasheet - Page 18

IC MPU POWERQUICC II PRO 672TBGA

MPC8349CZUAJFB

Manufacturer Part Number
MPC8349CZUAJFB
Description
IC MPU POWERQUICC II PRO 672TBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8349CZUAJFB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
533MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
672-TBGA
For Use With
MPC8349E-MITX-GP - KIT REFERENCE PLATFORM MPC8349EMPC8349E-MITXE - BOARD REFERENCE FOR MPC8349MPC8349EA-MDS-PB - KIT MODULAR DEV SYSTEM MPC8349E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8349CZUAJFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
DDR and DDR2 SDRAM
Table 19
Figure 4
18
At recommended operating conditions with GV
Controller Skew for MDQS—MDQ/MECC/MDM
Notes:
1. t
2. The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called t
3. This specification applies only to the DDR interface.
will be captured with MDQS[n]. This should be subtracted from the total timing budget.
determined by the equation: t
value of t
CISKEW
MDQS[n]
MDQ[x]
illustrates the DDR input timing diagram showing the t
provides the input AC timing specifications for the DDR SDRAM interface.
represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that
CISKEW
MCK[n]
MCK[n]
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
.
Parameter
Table 19. DDR and DDR2 SDRAM Input AC Timing Specifications
DISKEW
= ± (T/4 – abs (t
DD
Figure 4. DDR Input Timing Diagram
400 MHz
333 MHz
266 MHz
200 MHz
of (1.8 or 2.5 V) ± 5%.
t
t
MCK
DISKEW
CISKEW
Symbol
t
CISKEW
)); where T is the clock period and abs (t
D0
–600
–750
–750
–750
Min
D1
DISKEW
t
DISKEW
timing parameter.
Max
600
750
750
750
DISKEW
Freescale Semiconductor
CISKEW
. This can be
Unit
ps
) is the absolute
Notes
1, 2
3

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