EMC6D103S-CZC SMSC, EMC6D103S-CZC Datasheet - Page 83

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EMC6D103S-CZC

Manufacturer Part Number
EMC6D103S-CZC
Description
Industrial Temperature Sensors Auto Fan Contrllr Up to 4 Fans
Manufacturer
SMSC
Datasheet

Specifications of EMC6D103S-CZC

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features
Datasheet
SMSC EMC6D103
8.2.41
Register
Address
94h
95h
96h
Read/
Write
R/W
R/W
R/W
Bit[2:1] The number of edges for tach1 reading:
00=2 edges
01=3 edges
10=5 edges (default)
11=9 edges
Bit[3] Tachometer Reading Mode
0=mode 1 – standard
1=mode 2 – enhanced. (default)
Bit[4] Tach (Mode 2 only)
0=Don’t ignore first 3 edge (default)
1=Ignore first 3 tachometer edges after guard time
Note: This bit has been added to support a small sampling of fans that emit irregular tach pulses
Bit[7:5] PWM max stretching time
000=disable stretching
001=50msec
010=100msec
011=200msec
100=400msec
101=600msec
110=800msec (default)
111=950msec
PWM Max stretch time determines the maximum time for monitoring the tach input. If stretching is
disabled, the tach will only be monitored when the PWM duty cycle is ‘ON’.
Registers 94h-96h: PWMx Option Registers
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
Bits[1:0] Tachs reading registers associated with PWMx are updated: (Mode 2 only)
00=once a second (default)
when the PWM transitions ‘ON’. Typically, the guard time is sufficient for most fans.
PWM1 Option
PWM2 Option
PWM3 Option
Register
Name
Table 8.62 Registers 94h-96h: PWMx Option Registers
(MSb)
Bit 7
RES
RES
RES
DATASHEET
Bit 6
RES
RES
RES
83
Bit 5
OPP
OPP
OPP
GRD1
GRD1
GRD1
Bit 4
GRD0
GRD0
GRD0
Bit 3
SZEN
SZEN
SZEN
Bit 2
UPDT1
UPDT1
UPDT1
Bit 1
Revision 0.3 (03-01-07)
UPDT0
UPDT0
UPDT0
(LSb)
Bit 0
Default
Value
0Ch
0Ch
0Ch

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