LM4549VH National Semiconductor, LM4549VH Datasheet - Page 15

• Manufacturer Part Number: LM4549VH
• Description: IC CODEC AC '97 REV 2.1 48LQFP
• Manufacturer: National Semiconductor
• Type: Audio Codec '97r

Specifications of LM4549VH

• Data Interface: Serial
• Resolution (bits): 18 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 90 / 89
• Voltage - Supply, Analog: 4.2 V ~ 5.5 V
• Voltage - Supply, Digital: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3/4.2V
• Single Supply Voltage (max): 5.5V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *LM4549VH

Application Information
Register Descriptions
Reset Register (00h)
Writing any value to this register causes a register reset
which changes all of the registers back to their default val-
ues. If a read is performed on this register, the LM4549 will
return a value of 0D50h indicating that National 3D Sound is
implemented, 18bit data is supported for both the ADC’s and
DAC’s, and the volume control for True Line Level Out is
supported.
Master Volume Registers (02h, 04h, 06h)
These registers allow the output levels from LINE_OUT, LN-
LVL_OUT and MONO_OUT to be attenuated or muted.
There are 6-bits of volume control, plus one mute bit. It is a
5-bit volume range, where each step is nominally 1.5dB and
each output can be individually muted by either setting the
most significant bit (Mx5), and/or the mute bit (D15) to 1.
PC Beep Register (0Ah)
This register controls the level of the PC_BEEP input. The
PC_BEEP can be both attenuated and muted via register
0Ah. Step size is nominally 3dB. The signal present after the
attenuation and mute block is summed into both the left and
right channels.
Mixer Input Volume Registers (Index 0Ch - 18h)
These registers set the input volume levels including mute.
Each volume control is 5 bit which provides from a range of
+12dB gain to 34.5dB attenuation in 1.5dB steps. For stereo
ports, the left and right levels can be independently set. Mut-
ing a given port is accomplished by setting the MSB to 1.
Setting the MSB to 1 for stereo ports mutes both the left and
right channel. Register 0Eh has an additional 20dB boost for
a microphone level input. This is enabled by setting bit 6 of
register 0Eh to 1.
Record Select Register (1Ah)
This register independently controls the source for the right
and left channel which will be recorded by the stereo ADC.
The default value is 0000h which corresponds to Mic in.
Default: 8000h
Default: 0000h
Default: 8008h (mono regs.), 8808h (stereo regs.)
Mute
Mute
Mute
0
0
0
1
0
0
1
0
0
0
1
XX XXXX
Mx5:Mx0
1X XXXX
Gx4:Gx0
00 0000
01 1111
XXXXX
PV3:0
00000
01000
11111
XXXX
0000
1111
46.5dB attenuation
46.5dB attenuation
34.5dB attenuation
45dB attenuation
0dB attenuation
0dB attenuation
+12dB gain
Function
Function
Function
0dB gain
(Continued)
mute
mute
mute
15
Record (Input) Gain Register (1Ch)
This registers controls the Record (Input) Gain level for the
stereo input selected via the Record Select Control Register
(1Ah). The gain can be programmed from 0dB to +22.5dB in
1.5dB steps. The level for the left and right channel can be
individually controlled. The input can also be muted by set-
ting the MSB to 1.
General Purpose Register (20h)
This register controls many miscellaneous functions imple-
mented on the LM4549. The miscellaneous functions include
POP which allows the PCM to bypass the National 3D
Sound circuitry, 3D which enables or disables the National
3D Sound circuitry, MIX which selects the MONO_OUT
source, MS which selects the microphone mux source and
LPBK which connects the output of the stereo ADC to input
of the stereo DAC. LPBK provides for a digital loopthru path
when enabled.
Powerdown Control / Status Register (26h)
This read/write register is used to monitor subsystem readi-
ness and also to program the LM4549 powerdown states.
The lower half of this register is read only with a 1 , indicat-
ing the subsection is ready. Writing to the lower 8 bits will
have no effect.
SR2:SR0
SL2:SL0
Default: 8000h
LPBK
Mute
POP
MIX
BIT
MS
3D
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
0
1
PCM out path and mute, 0 = pre 3D, 1 =
Gx3:Gx0
Mono output select 0 = Mix, 1 = Mic
XXXX
1111
0000
National 3D Sound on / off 1 = on
Mic select 0 = Mic1 1 = Mic2
Right Record Source
Left Record Source
ADC/DAC loopback
Stereo Mix (R)
Stereo Mix (L)
Mono Mix (R)
Mono Mix (L)
Video In (R)
Video In (L)
Line In (R)
Line In (L)
Aux In (R)
Aux In (L)
CD In (R)
Function
CD In (L)
post 3D
Phone
Phone
Mic
Mic
22.5dB gain
Function
0dB gain
mute
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