LTC4266CGW#PBF Linear Technology, LTC4266CGW#PBF Datasheet - Page 20

• Manufacturer Part Number: LTC4266CGW#PBF
• Description: IC CTRLR IEEE 802.3AT 36-SSOP
• Manufacturer: Linear Technology

Specifications of LTC4266CGW#PBF

• Controller Type: Ethernet Controller (IEEE 802.3)
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP
• Input Voltage: 3.3V
• Supply Current: -2.4mA
• Digital Ic Case Style: SSOP
• No. Of Pins: 36
• Duty Cycle (%): 60%
• Uvlo: 25V
• Frequency: 1MHz
• Operating Temperature Range: 0°C To +70°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 36
• Mounting: Surface Mount
• Package Type: SSOP
• Screening Level: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Compliant

APPLICATIONS INFORMATION
LTC4266
at 1/16 the rate that it counts up. This allows the current
limit circuitry to tolerate intermittent overload signals with
duty cycles below about 6%; longer duty cycle overloads
will turn the port off.
I
port to tolerate minor faults without current limiting.
Per the IEEE specification, the LTC4266 will automatically
set I
rush at port turn-on, and then switch to the programmed
I
compliance, I
and 850mA if a Type 2 PD is detected. I
reset to 425mA when a port turns off.
Table 5. Example Current Limit Settings
20
CUT
LIM
LIM
setting once inrush has completed. To maintain IEEE
is typically set to a lower value than I
I
LIM
1063
1169
1275
1488
1700
1913
2125
2338
2550
2975
106
159
213
266
319
372
425
478
531
584
638
744
850
956
53
to 425mA (shown in bold in Table 5) during in-
(mA)
LIM
should kept at 425mA for all Type 1 PDs,
R
INTERNAL REGISTER SETTING (hex)
SENSE
88
08
89
80
8A
09
8B
00
8E
92
CB
10
D2
40
4A
50
5A
60
52
= 0.5Ω
LIM
R
is automatically
LIM
SENSE
to allow the
DA
8A
9A
C0
CA
D0
4A
5A
88
08
89
80
90
E0
49
40
50
60
52
= 0.25Ω
I
The LTC4266 features a two-stage foldback circuit that
reduces the port current if the port voltage falls below the
normal operating voltage. This keeps MOSFET power dis-
sipation at safe levels for typical 802.3af MOSFETs, even at
extended 802.3at power levels. Current limit and foldback
behavior are programmable on a per-port basis. Figure
14 shows MOSFET power dissipation with 802.3af-style
foldback compared with a typical MOSFET SOA curve;
Figure 15 demonstrates how two-stage foldback keeps
the FET within its SOA under the same conditions. Table 5
gives examples of recommended I
LIM
Foldback
Figure 14. Turn On Currents vs FET Safe Operating
Area at 90°C Ambient
Figure 15. LTC4266 Foldback vs FET Safe Operating
Area at 90°C Ambient
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
0
10
10
PD VOLTAGE (V) AT V
PD VOLTAGE (V) AT V
SOA DC AT 90°C
SOA DC AT 90°C
20
20
30
30
802.3af FOLDBACK
802.3af FOLDBACK
PSE
PSE
40
40
LIM
= 58V
= 58V
50
50
register settings.
4266 F14
4266 F15
60
60
4266fb