CY7C67200-48BAXI Cypress Semiconductor Corp, CY7C67200-48BAXI Datasheet - Page 28

USB HOST/PERIPH CNTRLR 48LFBGA

CY7C67200-48BAXI

Manufacturer Part Number
CY7C67200-48BAXI
Description
USB HOST/PERIPH CNTRLR 48LFBGA
Manufacturer
Cypress Semiconductor Corp
Series
EZ-OTG™r
Type
OTG Programmable USB On The Gor
Datasheet

Specifications of CY7C67200-48BAXI

Package / Case
48-LFBGA
Controller Type
USB Peripheral Controller
Interface
Serial
Voltage - Supply
2.7 V ~ 3.6 V, 3 V ~ 3.6 V
Current - Supply
80mA, 135mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Data Rate
2 Mbps
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Supply Current
80 mA
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Operating Supply Voltage
2.7 V to 3.6 V
Controller Family/series
PSoC 1
Core Size
16 Bit
No. Of I/o's
25
Program Memory Size
16KB
Ram Memory Size
8KB
Cpu Speed
48MHz
No. Of Timers
2
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY3663 - KIT DEV EZ-OTG/EZ-HOST
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2262
CY7C67200-48BAXI

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Document #: 38-08014 Rev. *G
Host n Frame Register [R]
Register Description
The Host n Frame register maintains the next frame number
to be transmitted (current frame number + 1). This value is
updated after each SOF transmission. This register resets to
0x0000 after each CPU write to the Host n SOF/EOP Count
register (Host 1: 0xC092, Host 2: 0xC0B2).
Frame (Bits [10:0])
The Frame field contains the next frame number to be trans-
mitted.
Table 27.USB Device Only Registers
Device n Endpoint n Control Register [R/W]
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Device n Endpoint n Control Register
Device n Endpoint n Address Register
Device n Endpoint n Count Register
Device n Endpoint n Status Register
Device n Endpoint n Count Result Register
Device n Interrupt Enable Register
Device n Address Register
Device n Status Register
Device n Frame Number Register
Device n SOF/EOP Count Register
• Host 1 Frame Register 0xC096
• Host 2 Frame Register 0xC0B6
• Device n Endpoint 0 Control Register [Device 1: 0x0200 Device 2: 0x0280]
• Device n Endpoint 1 Control Register [Device 1: 0x0210 Device 2: 0x0290]
• Device n Endpoint 2 Control Register [Device 1: 0x0220 Device 2: 0x02A0]
• Device n Endpoint 3 Control Register [Device 1: 0x0230 Device 2: 0x02B0]
• Device n Endpoint 4 Control Register [Device 1: 0x0240 Device 2: 0x02C0]
• Device n Endpoint 5 Control Register [Device 1: 0x0250 Device 2: 0x02D0]
• Device n Endpoint 6 Control Register [Device 1: 0x0260 Device 2: 0x02E0]
• Device n Endpoint 7 Control Register [Device 1: 0x0270 Device 2: 0x02F0]
15
R
0
7
0
-
14
R
0
6
0
-
Register Name
Reserved
Figure 29. Host n Frame Register
13
R
0
5
0
-
12
R
4
0
0
-
Reserved
All reserved bits must be written as ‘0’.
USB Device Only Registers
There are ten sets of USB Device Only registers. All sets
consist of at least two registers, one for Device Port 1 and one
for Device Port 2. In addition, each Device port has eight
possible endpoints. This gives each endpoint register set eight
registers for each Device Port for a total of 16 registers per set.
The USB Device Only registers are covered in this section and
summarized in
...Frame
11
R
3
0
0
-
Table
0x02n0
0x02n2
0x02n4
0x02n6
0x02n8
0xC08C/0xC0AC
0xC08E/0xC0AE
0xC090/0xCB0
0xC092/0xC0B2
0xC094/0xC0B4
27.
10
(Device 1/Device 2)
R
R
2
0
0
Address
Frame...
R
R
1
0
9
0
CY7C67200
Page 28 of 78
R
R
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
8
0
W
R
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