CY7C67200-48BAXI Cypress Semiconductor Corp, CY7C67200-48BAXI Datasheet - Page 74

• Manufacturer Part Number: CY7C67200-48BAXI
• Description: USB HOST/PERIPH CNTRLR 48LFBGA
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-OTG™r
• Type: OTG Programmable USB On The Gor

Specifications of CY7C67200-48BAXI

• Package / Case: 48-LFBGA
• Controller Type: USB Peripheral Controller
• Interface: Serial
• Voltage - Supply: 2.7 V ~ 3.6 V, 3 V ~ 3.6 V
• Current - Supply: 80mA, 135mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Rate: 2 Mbps
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current: 80 mA
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Operating Supply Voltage: 2.7 V to 3.6 V
• Controller Family/series: PSoC 1
• Core Size: 16 Bit
• No. Of I/o's: 25
• Program Memory Size: 16KB
• Ram Memory Size: 8KB
• Cpu Speed: 48MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2262; CY7C67200-48BAXI

Document #: 38-08014 Rev. *G
Table 42. Register Summary (continued)
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
W
R
W
R/W
R/W
R/W
R/W
Address Register
0xC024
0xC026
0xC028
0xC03C
0xC070
0xC072
0xC074
0xC076
0xC078
0xC07A
0xC07C
0xC07E
0xC080
0xC0A0
0xC082
0xC0A2
0xC084
0xC0A4
0xC086
0xC0A6
0xC086
0xC0A4
0xC088
0xC0A8
0xC088
0xC0A8
0xC08A
0xC0AA
0xC08C
0xC08C
0xC08E
0xC0AE
GPIO 1 Output Data
GPIO 1 Input Data
GPIO 1 Direction
USB Diagnostic
HSS Control
HSS Baud Rate
HSS Transmit Gap
HSS Data
HSS Receive Address
HSS Receive Counter
HSS Transmit Address
HSS Transmit Counter
Host n Control
Host n Address
Host n Count
Host n PID
Host n EP Status
Host n Count Result
Host n Device Address
USB n Control
Host 1 Interrupt Enable
Device 1 Interrupt Enable
Device n Address
VBUS
VBUS
Bit 15
Bit 7
GPIO31
GPIO23
GPIO31
GPIO23
GPIO31
GPIO23
Reserved
...Reserved
HSS
Enable
Transmit Done
Interrupt Flag
Reserved
...Baud
Reserved
Transmit Gap Select
Reserved
Data
Address...
...Address
Reserved
...Counter
Address..
...Address
Reserved
...Counter
Reserved
Preamble
Enable
Address...
...Address
Reserved
...Count
Reserved
Stall
Flag
Reserved
PID Select
Result...
...Result
Reserved...
...Reserved
Reserved
Port A
Resistors
Enable
Interrupt
Enable
Reserved
Interrupt
Enable
EP7
Interrupt
Enable
Reserved...
...Reserved
Bit 14
Bit 6
GPIO30
GPIO22
GPIO30
GPIO22
GPIO30
GPIO22
Port 2A Diag-
nostic Enable
Pull-down
Enable
RTS
Polarity Select
Receive Done
Interrupt Flag
Sequence
Select
Port Select
NAK
Flag
Address
Reserved
ID
Interrupt
Enable
Port A
Wake Interrupt
Enable
ID
Interrupt
Enable
EP6
Interrupt
Enable
Address
Bit 13
Bit 5
GPIO29
GPIO21
GPIO29
GPIO21
GPIO29
GPIO21
Reserved
LS Pull-up
Enable
CTS
Polarity Select
One
Stop Bit
Sync
Enable
Reserved
Length
Exception Flag
Port A
D+ Status
Reserved
Reserved
Reserved
EP5
Interrupt
Enable
Bit 12
Bit 4
Reserved
GPIO20
Reserved
GPIO20
Reserved
GPIO20
Port 1A Diag-
nostic Enable
FS Pull-up
Enable
XOFF
Transmit
Ready
HSS Baud...
ISO
Enable
Reserved
Port A
D– Status
Port A
Force D±
State
Port A Con-
nect Change
Interrupt
Enable
EP4
Interrupt
Enable
Bit 11
Bit 3
GPIO19
GPIO19
GPIO19
Reserved...
Reserved
XOFF
Enable
Packet
Mode Select
Reserved
Overflow
Flag
Sequence
Status
Endpoint Select
Reserved
Reserved
SOF/EOP
Timeout Inter-
rupt Enable
EP3
Interrupt
Enable
Bit 10
Bit 2
Reserved
Reserved
Reserved
Force Select
CTS
Enable
Receive
Overflow Flag
Underflow
Flag
Timeout
Flag
LOA
Suspend
Enable
Reserved
EP2
Interrupt
Enable
Bit 9
Bit 1
Receive Inter-
rupt Enable
Receive Pack-
et Ready Flag
Counter...
Counter...
Count...
Reserved
Error
Flag
Mode
Select
Reserved
SOF/EOP
Interrupt
Enable
SOF/EOP
Interrupt
Enable
EP1
Interrupt
Enable
CY7C67200
Bit 8
Bit 0
GPIO24
GPIO24
GPIO24
Done Interrupt
Enable
Receive
Ready Flag
Arm
Enable
ACK
Flag
Reserved
Port A
SOF/EOP
Enable
Reserved
Done
Interrupt
Enable
Reset
Interrupt
Enable
EP0
Interrupt
Enable
Page 74 of 78
Default High
Default Low
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0001 0111
0000 0000
0000 1001
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
xxxx 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
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