COM20020I-DZD SMSC, COM20020I-DZD Datasheet - Page 35

IC CTRLR LAN UNIV 2KX8 28-PLCC

COM20020I-DZD

Manufacturer Part Number
COM20020I-DZD
Description
IC CTRLR LAN UNIV 2KX8 28-PLCC
Manufacturer
SMSC
Series
ARCNETr
Datasheet

Specifications of COM20020I-DZD

Controller Type
ARCNET Controller
Interface
Differential
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
20mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Product
Controller Area Network (CAN)
Number Of Transceivers
1
Data Rate
5 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Supply Current (max)
40 mA (Typ)
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1001-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
COM20020I-DZD
Manufacturer:
Standard
Quantity:
17 665
Part Number:
COM20020I-DZD
Manufacturer:
SMSC
Quantity:
269
Part Number:
COM20020I-DZD
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
COM20020I-DZD-TR
Manufacturer:
Microchip
Quantity:
1 048
Part Number:
COM20020I-DZD-TR
Manufacturer:
Microchip Technology
Quantity:
10 000
5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
Datasheet
SMSC COM20020I Rev D
BIT
4,3
1,0
7
6
5
2
Reset
Command
Chaining Enable
Transmit Enable
Extended
Timeout 1,2
Backplane
Sub Address 1,0
BIT NAME
RESET
CCHEN
TXEN
ET1, ET2
BACK-
PLANE
SUBAD 1,0
SYMBOL
Table 6.9 - Configuration Register
DATASHEET
A software reset of the COM20020ID is executed by writing a logic
"1" to this bit. A software reset does not reset the microcontroller
interface mode, nor does it affect the Configuration Register. The
only registers that the software reset affect are the Status Register,
the Next ID Register, and the Diagnostic Status Register. This bit
must be brought back to logic "0" to release the reset.
This bit, if high, enables the Command Chaining operation of the
device. Please refer to the Command Chaining section for further
details. A low level on this bit ensures software compatibility with
previous SMSC ARCNET devices.
When low, this bit disables transmissions by keeping nPULSE1,
nPULSE2 if in non-Backplane Mode, and nTXEN pin inactive.
When high, it enables the above signals to be activated during
transmissions. This bit defaults low upon reset. This bit is typically
enabled once the Node ID is determined, and never disabled during
normal operation. Please refer to the Improved Diagnostics section
for details on evaluating network activity.
These bits allow the network to operate over longer distances than
the default maximum 2 miles by controlling the Response, Idle, and
Reconfiguration Times. All nodes should be configured with the
same timeout values for proper network operation. For the
COM20020ID with a 20 MHz crystal oscillator, the bit combinations
follow:
ET2
0
0
1
1
Note: These values are for 5Mbps and RCNTMR[1,0]=00.
A logic "1" on this bit puts the device into Backplane Mode signaling
which is used for Open Drain and Differential Driver interfaces.
These bits determine which register at address 07 may be
accessed. The combinations are as follows:
SUBAD1
See also the Sub Address Register.
0
0
1
1
Reconfiguration time is changed by the RCNTMR1 and
RCNTMR0 bits.
Page 35
ET1
0
1
0
1
SUBAD0
1
0
0
1
DESCRIPTION
Response
Time (μS)
596.6
298.4
149.2
37.4
Register
Tentative ID
Node ID
Setup 1
Next ID
Idle Time
(μS)
656
328
164
41
Revision 12-05-06
Reconfig
Time (mS)
840
840
840
420

Related parts for COM20020I-DZD