ISP1161ABM ST-Ericsson Inc, ISP1161ABM Datasheet - Page 104

• Manufacturer Part Number: ISP1161ABM
• Description: IC USB HOST/DEVICE CTRLR 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABM

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3150

Philips Semiconductors
Table 96:
9397 750 13962
Product data
Bit
Symbol
Reset
Access
DcErrorCode register: bit allocation
UNREAD
R
7
0
13.2.7 Acknowledge Setup (F4H)
13.3.1 Read Endpoint Error Code (R: A0H–AFH)
13.3 General commands
This command acknowledges to the host that a SETUP packet was received. The
arrival of a SETUP packet disables the Validate Buffer and Clear Buffer commands
for the control IN and OUT endpoints. The microprocessor needs to re-enable these
commands by sending an Acknowledge Setup command, see
Code (Hex): F4 — acknowledge setup
Transaction — none
This command returns the status of the last transaction of the selected endpoint, as
stored in the DcErrorCode register. Each new transaction overwrites the previous
status information. The bit allocation of the DcErrorCode register is shown in
Table
Code (Hex): A0 to AF — read error code (control OUT, control IN, endpoint 1 to 14)
Transaction — read 1 word
Table 97:
Table 98:
DATA01
Bit
7
6
5
4 to 1
0
Error code
(Binary)
0000
0001
0010
0011
0100
0101
R
6
0
96.
Transaction error codes
DcErrorCode register: bit description
Symbol
UNREAD
DATA01
-
ERROR[3:0]
RTOK
reserved
Description
no error
PID encoding error; bits 7 to 4 are not the inverse of bits 3 to 0
PID unknown; encoding is valid, but PID does not exist
unexpected packet; packet is not of the expected type (token, data, or
acknowledge), or is a SETUP token to a non-control endpoint
token CRC error
data CRC error
R
5
0
Rev. 03 — 23 December 2004
Description
Logic 1 indicates that a new event occurred before the previous
status was read.
This bit indicates the PID type of the last successfully received
or transmitted packet (0 = DATA0 PID, 1 = DATA1 PID).
reserved
Error code. For error description, see
Logic 1 indicates that data was received or transmitted
successfully.
Full-speed USB single-chip host and device controller
R
4
0
R
3
0
ERROR[3:0]
R
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table
Section
ISP1161A
R
1
0
98.
11.3.6.
RTOK
103 of 134
R
0
0