ISP1161ABM ST-Ericsson Inc, ISP1161ABM Datasheet - Page 47

• Manufacturer Part Number: ISP1161ABM
• Description: IC USB HOST/DEVICE CTRLR 64-LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABM

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3150

Philips Semiconductors
9397 750 13962
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
R/W
R/W
15
0
7
0
10.1.3 HcCommandStatus register (R/W: 02H/82H)
HCFS[1:0]
Table 11:
The HcCommandStatus register is used by the HC to receive commands issued by
the HCD, and it also reflects the HC’s current status. To the HCD, it appears to be a
‘write to set’ register. The HC must ensure that bits written as logic 1 become set in
Bit
31 to 11
10
9
8
7 to 6
5 to 0
R/W
R/W
14
0
6
0
HcControl register: bit description
Symbol
-
RWE
RWC
-
HCFS
-
reserved
R/W
R/W
13
0
5
0
Rev. 03 — 23 December 2004
Description
reserved
RemoteWakeupEnable: This bit is used by the HCD to enable or
disable the remote wake-up feature upon the detection of
upstream resume signaling. When this bit is set and the
ResumeDetected bit in HcInterruptStatus is set, a remote wake-up
is signaled to the host system. Setting this bit has no impact on the
generation of hardware interrupt.
RemoteWakeupConnected: This bit indicates whether the HC
supports remote wake-up signaling. If remote wake-up is
supported and used by the system, it is the responsibility of
system firmware to set this bit during POST. The HC clears the bit
upon a hardware reset but does not alter it upon a software reset.
Remote wake-up signaling of the host system is host-bus-specific,
and is not described in this specification.
reserved
HostControllerFunctionalState for USB:
00B — USBReset
01B — USBResume
10B — USBOperational
11B — USBSuspend
A transition to USBOperational from another state causes
start-of-frame (SOF) generation to begin 1 ms later. The HCD
determines whether the HC has begun sending SOFs by reading
the StartofFrame field of HcInterruptStatus.
This field can be changed by the HC only when in the
USBSuspend state. The HC can move from the USBSuspend
state to the USBResume state after detecting the resume signaling
from a downstream port.
The HC enters USBReset after a software reset and a hardware
reset. The latter also resets the Root Hub and asserts subsequent
reset signaling to downstream ports.
reserved
Full-speed USB single-chip host and device controller
R/W
R/W
12
0
4
0
R/W
R/W
11
0
3
0
reserved
RWE
R/W
R/W
10
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
RWC
ISP1161A
R/W
R/W
9
0
1
0
reserved
R/W
R/W
46 of 134
8
0
0
0