ISP1161ABD-S ST-Ericsson Inc, ISP1161ABD-S Datasheet - Page 62

• Manufacturer Part Number: ISP1161ABD-S
• Description: IC USB HOST CTRL FULL-SPD 64LQFP
• Manufacturer: ST-Ericsson Inc

Specifications of ISP1161ABD-S

• Controller Type: USB 2.0 Controller
• Interface: Parallel
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 47mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Philips Semiconductors
Table 34:
9397 750 13962
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRhPortStatus[1:2] register: bit allocation
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
10.3.4 HcRhPortStatus[1:2] register (R/W [1]:15H/95H, [2]: 16H/96H)
The HcRhPortStatus[1:2] register is used to control and report port events on a
per-port basis. NumberDownstreamPorts represents the number of HcRhPortStatus
registers that are implemented in hardware. The lower word is used to reflect the port
status, whereas the upper word reflects the status change bits. Some status bits are
implemented with special write behavior. If a transaction (token through handshake)
is in progress when a write to change port status occurs, the resulting port status
change must be postponed until the transaction completes. Reserved bits should
always be written logic 0.
Code (Hex): [1] = 15, [2] = 16 — read
Code (Hex): [1] = 95, [2] = 96 — write
reserved
reserved
Table 35:
Bit
31 to 21
20
19
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
HcRhPortStatus[1:2] register: bit description
Symbol
-
PRSC
OCIC
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 03 — 23 December 2004
reserved
Description
reserved
PortResetStatusChange: This bit is set at the end of the 10 ms
port reset signal. The HCD writes logic 1 to clear this bit. Writing
logic 0 has no effect.
0 — port reset is not complete
1 — port reset is complete
PortOverCurrentIndicatorChange: This bit is valid only if
overcurrent conditions are reported on a per-port basis. This bit is
set when Root Hub changes the PortOverCurrentIndicator bit. The
HCD writes logic 1 to clear this bit. Writing logic 0 has no effect.
0 — no change in PortOverCurrentIndicator
1 — PortOverCurrentIndicator has changed
PRSC
PRS
Full-speed USB single-chip host and device controller
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
reserved
OCIC
POCI
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
PSSC
R/W
R/W
R/W
PSS
R/W
26
18
10
0
0
0
2
0
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
PESC
LSDA
ISP1161A
R/W
R/W
R/W
PES
R/W
25
17
0
0
9
0
1
0
CSC
CCS
PPS
R/W
R/W
R/W
R/W
61 of 134
24
16
0
0
8
0
0
0