DP8409AN National Semiconductor, DP8409AN Datasheet - Page 18

• Manufacturer Part Number: DP8409AN
• Description: IC CONTROLLER DYNAMIC RAM 48-DIP
• Manufacturer: National Semiconductor

Specifications of DP8409AN

• Controller Type: Dynamic RAM (DRAM) Controller, Drivers
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 250mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 48-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: *DP8409AN

TRI-STATE (Continued)
t
t
Symbol
HZL
LHZ
Switching Characteristics DP8409A DP8409A-3
V
of 22 DRAMs each or 88 DRAMs including trace capacitance These values are Q0 – Q8 C
150 pF WE C
closed unless otherwise noted and R1 and R2 are 4 7 k
with all outputs switching
Switching Characteristics DP8409A-2
V
of 22 DRAMs each or 88 DRAMs including trace capacitance These values are Q0 – Q8 C
150 pF WE C
closed unless otherwise noted and R1 and R2 are 4 7 k
with all outputs switching
Symbol
ACCESS
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RICL
RICL
RICH
RICH
RCDL
RCDL
RCDH
RCDH
CCDH
RAH
RAH
ASC
ASC
RCV
RCV
RPDL
RPDH
APDL
APDH
SPDL
SPDH
ASA
AHA
ADS
CC
CC
e
e
5 0V
5 0V
CS Low to Control Output Low from
Hi-Z High
CS High to Control Output Hi-Z High
from Low
g
g
RASIN to CAS Output Delay (Mode 5)
RASIN to CAS Output Delay (Mode 6)
RASIN to CAS Output Delay (Mode 5)
RASIN to CAS Output Delay (Mode 6)
RAS to CAS Output Delay (Mode 5)
RAS to CAS Output Delay (Mode 6)
RAS to CAS Output Delay (Mode 5)
RAS to CAS Output Delay (Mode 6)
CASIN to CAS Output Delay (Mode 6)
Row Address Hold Time (Mode 5) (Note 7)
Row Address Hold Time (Mode 6) (Note 7)
Column Address Set-Up Time (Mode 5)
Column Address Set-Up Time (Mode 6)
RASIN to Column Address Valid (Mode 5)
RASIN to Column Address Valid (Mode 6)
RASIN to RAS Delay
RASIN to RAS Delay
Address Input to Output Low Delay
Address Input to Output High Delay
Address Strobe to Address Output Low
Address Strobe to Address Output High
Address Set-Up Time to ADS
Address Hold Time from ADS
Address Strobe Pulse Width
L
L
5% 0 C
5% 0 C
e
e
500 pF CAS C
500 pF CAS C
Parameter
s
s
T
T
A s
A s
Parameter
70 C (unless otherwise noted) (Notes 2 4 5) The output load capacitance is typical for 4 banks
70 C (unless otherwise noted) (Notes 2 4 5) The output load capacitance is typical for 4 banks
L
L
e
e
600 pF (unless otherwise noted) See Figure 11 for test load Switches S1 and S2 are
600 pF (unless otherwise noted) See Figure 11 for test load Switches S1 and S2 are
Figure 12
Figure 12
S1 S2 Open
C
R2
L
e
e
Conditions
15 pF
750
unless otherwise noted Maximum propagation delays are specified
unless otherwise noted Maximum propagation delays are specified
18
Figure 8a
Figures 8a 8b
Figure 8a
Figures 8a 8b
Figure 8a
Figures 8a 8b
Figure 8a
Figure 8a
Figure 8b
Figure 8a
Figures 8a 8b
Figure 8a
Figures 8a 8b
Figure 8a
Figures 8a 8b
Figures 7a 7b 8a 8b
Figures 7a 7b 8a 8b
Figures 7a 7b 8a 8b
Figures 7a 7b 8a 8b
Figures 7a 7b
Figures 7a 7b
Figures 7a 7b 8a 8b
Figures 7a 7b 8a 8b
Figures 7a 7b 8a 8b
S1 Open
Conditions
Min
DP8409A
(Continued)
Typ
45
50
Min
Max
75
65
40
50
40
20
12
20
15
15
15
30
3
3
75
80
L
L
e
e
500 pF RAS0– RAS3 C
500 pF RAS0– RAS3 C
8409A-2
Min
Typ
100
90
48
63
75
65
27
40
54
80
70
27
23
25
25
40
40
DP8409A-3
Typ
45
50
Max
130
115
100
105
60
80
85
40
65
70
90
35
32
40
40
60
60
Max
75
80
Units
Units
L
L
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
e
e