DP83916VF National Semiconductor, DP83916VF Datasheet - Page 55

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

Figure 5-7 illustrates the SONIC-16’s transitions through
5 0 Bus Interface
5 4 3 1 Bus Status Transitions
When the SONIC-16 acquires the bus it only transfers data
to from a single area in memory (i e TDA TBA RDA RBA
RRA or CDA) Thus the bus status pins remain stable for
the duration of the block transfer cycle with the following
three exceptions 1) If the SONIC-16 is accessed during a
block transfer S2–S0 indicates bus idle during the register
access then returns to the previous status 2) If the SONIC-
16 finishes writing the Source Address during a block trans-
fer S2 –S0 changes from 0 1 0 to 0 1 1
RDA access between the RXpkt seq no and RXpkt link ac-
cess and between the RXpkt link and RXpkt in use ac-
cess S2 –S0 will respectively indicate idle 1 1 1 for 2 or 1
bus clocks Status will be valid on the falling edge of AS or
rising edge of ADS
memory during the process of transmission and reception
During transmission the SONIC-16 reads the descriptor in-
formation from the TDA and then transmits data of the
packet from the TBA The SONIC-16 moves back and forth
between the TDA and TBA until all fragments and packets
are transmitted During reception the SONIC-16 takes one
of two paths In the first case (path A) when the SONIC-16
detects EOL
accepted packet into the RBA and then writes the descrip-
tor information to the RDA If the RBA becomes depleted
(i e RBWC0 1
resource descriptor In the second case (path B) when the
SONIC-16 detects EOL
e
0 from the previous reception it buffers the
k
EOBC) it moves to the RRA to read a
e
1 from the previous reception it
(Continued)
FIGURE 5-7 Bus Status Transitions
3) During an
55
rereads the RXpkt link field to determine if the system has
reset the EOL bit since the last reception If it has the SON-
IC-16 buffers the packet as in the first case Otherwise it
rejects the packet and returns to idle
5 4 4 Bus Mode Compatibility
For compatibility with different microprocessor and bus ar-
chitectures the SONIC-16 operates in one of two modes
(set by the BMODE pin) called the National Intel or little
endian mode (BMODE tied low) and the Motorola or big
endian mode (BMODE tied high) The definitions for several
pins change depending on the mode the SONIC-16 is in
Table 5-3 shows these changes These modes affect both
master and slave bus operations with the SONIC-16
BR HOLD
BG HLDA
MRW MWR
SRW SWR
DSACK0 RDYi
DSACK1 RDYo
AS ADS
INT INT
Pin Name
TABLE 5-3 Bus Mode Compatibility
(National Intel)
HOLD
HLDA
MWR
SWR
RDYi
RDYo
ADS
INT
BMODE
e
0
BMODE
BR
BG
MRW
SRW
DSACK0
DSACK1
AS
INT
(Motorola)
TL F 11722 – 29
e
1