CS8952-IQZ Cirrus Logic Inc, CS8952-IQZ Datasheet - Page 18

• Manufacturer Part Number: CS8952-IQZ
• Description: IC TXRX 100/10 PHY 100TQFP
• Manufacturer: Cirrus Logic Inc
• Type: Transceiverr

Specifications of CS8952-IQZ

• Package / Case: 100-TQFP, 100-VQFP
• Protocol: MII
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Transceivers
• Number Of Transceivers: 1
• Standard Supported: 100BASE-FX or 100BASE-TX or 10BASE-T
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 6 V
• Supply Voltage (min): - 0.3 V
• Supply Current (max): +/- 10 mA
• Maximum Operating Temperature: + 70 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1208

2. INTRODUCTION
The CS8952 is a complete physical-layer transceiv-
er for 100BASE-TX and 10BASE-T applications.
Additionally, the CS8952 can be used with an ex-
ternal optical module for 100BASE-FX.
2.1
The highly integrated mixed-signal design of the
CS8952 eliminates the need for external analog cir-
cuitry such as external transmit or receive filters.
The CS8952 builds upon Cirrus Logic’s experience
in pioneering the high-volume manufacturing of
10BASE-T integrated circuits with “true” internal
filters. The CS8952, CS8920, CS8904, and
CS8900 include fifth-order, continuous-time But-
terworth 10BASE-T transmit and receive filters, al-
lowing those products to meet 10BASE-T wave
shape, emission, and frequency content require-
ments without external filters.
2.2
The CS8952 is implemented in low power CMOS,
consuming only 135 mA typically. Three low-pow-
er modes are provided to make the CS8952 ideal
for power sensitive applications such as CardBus.
2.3
The CS8952’s digital interface and operating
modes can be tailored to efficiently support a wide
variety of applications. For example, the Media In-
dependent Interface (MII) supports 100BASE-TX,
100BASE-FX and 10BASE-T NIC cards, switch
ports and router ports. Additionally, the low-laten-
cy “repeater” interface mode minimizes data delay
through the CS8952, facilitating system compli-
ance with overall network delay budgets. To sup-
port 10BASE-T applications, the CS8952 provides
a 10BASE-T serial port (Seven-wire ENDEC inter-
face).
2.4
Figure 1 illustrates a typical MII to CS8952 appli-
cation with twisted-pair and fiber interfaces. Refer
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
DS206F1
High Performance Analog
Low Power Consumption
Application Flexibility
Typical Connection Diagram
to the Analog Design Considerations section for
detailed information on power supply requirements
and decoupling, crystal and magnetics require-
ments, and twisted-pair and fiber transceiver con-
nections.
3. FUNCTIONAL DESCRIPTION
The CS8952 is a complete physical-layer transceiv-
er for 100BASE-TX and 10BASE-T applications.
It provides a Physical Coding Sub-layer for com-
munication with an external MAC (Media Access
Controller). The CS8952 also includes a complete
Physical Medium Attachment layer and a
100BASE-TX and 10BASE-T Physical Medium
Dependent layer. Additionally, the CS8952 pro-
vides a PECL interface to an external optical mod-
ule for 100BASE-FX applications.
The primary digital interface to the CS8952 is an
enhanced IEEE 802.3 Media Independent Interface
(MII). The MII supports parallel data transfer, ac-
cess to the CS8952 Control and Status registers,
and several status and control pins. The CS8952's
operating modes can be tailored to support a wide
variety of applications, including low-latency
100BASE-TX repeaters, switches and MII-based
network interface cards.
For 100BASE-TX applications, the digital data in-
terface can be either 4-bit parallel (nibbles) or 5-bit
parallel (code-groups). For 10BASE-T applica-
tions, the digital data format can be either 4-bit par-
allel (nibbles) or one-bit serial.
The CS8952 is controlled primarily by configura-
tion registers via the MII Management Interface.
Additionally, a number of the most fundamental
register bits can be set at power-up and reset time
by connecting pull-up or pull-down resistors to ex-
ternal pins.
The CS8952's MII interface is enhanced beyond
IEEE requirements by register extensions and the
addition of pins for MII_IRQ, RX_EN, and ISO-
DEF signals. The MII_IRQ pin provides an inter-
CS8952
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