DS33R41+ Maxim Integrated Products, DS33R41+ Datasheet - Page 10
DS33R41+
Manufacturer Part Number
DS33R41+
Description
IC TXRX ETHERNET MAP 400-BGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS33R41.pdf
(335 pages)
Specifications of DS33R41+
Number Of Drivers/receivers
4/4
Protocol
T1/E1/J1
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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An 8-bit parallel microcontroller port provides access for control and configuration of all the features of the device.
The internal 100MHz SDRAM controller interfaces to a 32-bit wide 128Mbit SDRAM. The SDRAM is used to buffer
the data from the Ethernet and WAN ports for transport. The external SDRAM can accommodate up to 8192
frames with a maximum frame size of 2016 bytes. Diagnostic capabilities include SDRAM BIST, loopbacks, PRBS
pattern generation/detection, and 16-bit loop-up and loop-down code generation and detection. The DS33R41
operates with a 1.8V core supply and 3.3V I/O supply.
The integrated Ethernet mapper is software compatible with the DS33Z41 quad inverse-multiplexing Ethernet
mapper. There are a few things to note when porting a DS33Z41 application to this device:
The integrated T1/E1/J1 transceivers are software compatible with the DS21458 quad T1/E1/J1 transceiver. There
are a few things to note when porting a DS21458 application to this device:
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RSER has been renamed to RSERI.
RCLK has been renamed to RCLKI.
TSER has been renamed to TSERO.
TCLK has been renamed to TCLKE.
The facilities data link (FDL) support is available through software only. The TLINK, RLINK, TLCLK,
RLCLK pins are not available on the DS33R41.
Multiplexed microprocessor bus mode is not supported on the DS33R41.
The extended system information bus (ESIB) is not supported on the DS33R41.
The RSIGF signaling freeze indication hardware pin is not available.
The user output pins UOP1, UOP2, UOP3, and UOP4 are not available.
10 of 335
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