MCP2021-500E/MD Microchip Technology, MCP2021-500E/MD Datasheet - Page 8

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MCP2021-500E/MD

Manufacturer Part Number
MCP2021-500E/MD
Description
IC LIN TXRX ON-BOARD VREG 8DFN
Manufacturer
Microchip Technology
Type
Transceiverr
Datasheet

Specifications of MCP2021-500E/MD

Number Of Drivers/receivers
1/1
Protocol
LIN
Voltage - Supply
6 V ~ 18 V
Mounting Type
Surface Mount
Package / Case
8-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC164130 - BOARD DAUGHT PICTL PLUS ECAN/LIN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
MCP2021/2
1.5
TABLE 1-1:
1.5.1
Positive Supply Voltage Regulator Output pin.
1.5.2
Ground pin.
1.5.3
Battery Positive Supply Voltage pin. This pin is also the
input for the internal voltage regulator.
1.5.4
The Transmit Data Input pin has an internal pull-up to
V
and high (recessive) when TXD is high.
For extra bus security, TXD is internally forced to ‘1’
when V
In case the thermal protection detects an over-temper-
ature condition while the signal TXD is low, the
transmitter is shutdown. The recovery from the thermal
shutdown is equal to adequate cooling time.
1.5.5
The Receive Data Output pin is a standard CMOS
output and follows the state of the LIN pin.
1.5.6
The bidirectional LIN bus Interface pin is the driver unit
for the LIN pin and is controlled by the signal TXD. LIN
has an open collector output with a current limitation.
To reduce EMI, the edges during the signal changes
are slope-controlled. To further reduce radiated
emissions, the L
both falling and rising edges.
DS22018E-page 8
Legend: TTL = TTL input buffer, ST = Schmitt Trigger input buffer, OD = Open-Drain output,
REG
FAULT/TXE
CS/LWAKE
RESET
Name
. The LIN pin is low (dominant) when TXD is low,
V
L
TXD
RXD
V
V
Pin
REG
BUS
REG
SS
BB
Pin Descriptions
P = Power, O = Output, I = Input
POWER OUTPUT (V
GROUND (V
BATTERY (V
TRANSMIT DATA INPUT (TXD)
RECEIVE DATA OUTPUT (RXD)
LIN BUS
is less than 1.8V (typ.).
BUS
PINOUT DESCRIPTIONS
pin has corner-rounding control for
8-Pin
PDIP,
SOIC
DFN,
8
3
5
7
4
1
6
2
Devices
SS
BB
)
)
TSSOP
14-Pin
SOIC,
PDIP,
14
11
13
12
3
4
1
2
5
REG
)
Type
TTL
Pin
OD
OD
I/O
O
O
P
P
I
Power Output
Ground
Battery Supply
Transmit Data Input (TTL)
Receive Data Output (CMOS)
LIN bus (bidirectional)
Chip Select (TTL)
Fault Detect Output, Transmitter Enable (OD)
RESET signal Output (OD)
The internal LIN Receiver observes the activities on
LIN bus, and generates the output signal RXD that
follows the state of the L
pass input filter is placed to maintain EMI immunity.
1.5.7
Chip Select Input pin. A internal pull-down resistor will
keep the CS/LWAKE pin low. This is done to ensure
that no disruptive data will be present on the bus while
the microcontroller is executing a Power-on Reset and
I/O initialization sequence. The pin must see a high
level to activate the transmitter.
If CS/LWAKE= ‘0’ when the V
the device stays in Ready mode (Low-power mode). In
Ready mode, both the receiver and the voltage
regulator are on and the LIN transmitter driver is off.
If CS/LWAKE = ‘1’ when the V
the device will proceed to the Operation mode as soon
as the V
This pin may also be used as a local wake-up input
(See Example 1-1). In this implementation, the micro-
controller will set the I/O pin that controls the CS/
LWAKE as an high-impedance input. The internal pull-
down resistor will keep the input low. An external
switch, or other source, can then wake-up both the
transceiver and the microcontroller.
Note:
REG
CS/LWAKE
CS/LWAKE should not be tied directly to
V
Operation
microcontroller is initialized.
output has stabilised.
Normal Operation
REG
Function
as this could force the MCP202x into
© 2009 Microchip Technology Inc.
BUS
Mode
. A 1
BB
BB
st
supply is turned on,
supply is turned on,
degree 1 MHz, low-
before
the

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