PIC16LF1827-I/MV Microchip Technology Inc., PIC16LF1827-I/MV Datasheet - Page 333

• Manufacturer Part Number: PIC16LF1827-I/MV
• Description: 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, nan
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16LF1827-I/MV

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 7K Bytes
• Ram Size: 384 Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V

LSLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
LSRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2011 Microchip Technology Inc.
Logical Left Shift
[ label ] LSLF
0  f  127
d [0,1]
(f<7>)  C
(f<6:0>)  dest<7:1>
0  dest<0>
C, Z
The contents of register ‘f’ are shifted
one bit to the left through the Carry flag.
A ‘0’ is shifted into the LSb. If ‘d’ is ‘0’,
the result is placed in W. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
Logical Right Shift
[ label ] LSLF
0  f  127
d [0,1]
0  dest<7>
(f<7:1>)  dest<6:0>,
(f<0>)  C,
C, Z
The contents of register ‘f’ are shifted
one bit to the right through the Carry
flag. A ‘0’ is shifted into the MSb. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
0
C
register f
f {,d}
f {,d}
register f
C
0
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Words:
Cycles:
Example:
PIC16(L)F1826/27
Move f
[ label ]
0  f  127
d  [0,1]
(f)  (dest)
Z
The contents of register f is moved to
a destination dependent upon the
status of d. If d = 0,
destination is W register. If d = 1, the
destination is file register f itself. d = 1
is useful to test a file register since
status flag Z is affected.
1
1
After Instruction
MOVF
W =
Z
MOVF f,d
=
FSR, 0
value in FSR register
1
DS41391D-page 333