SI5110-H-GL Silicon Laboratories Inc, SI5110-H-GL Datasheet - Page 26

• Manufacturer Part Number: SI5110-H-GL
• Description: IC TXRX SONET/SDH LP HS 99LFBGA
• Manufacturer: Silicon Laboratories Inc
• Series: SiPHY®r
• Type: Transceiverr

Specifications of SI5110-H-GL

• Package / Case: 99-LFBGA
• Number Of Drivers/receivers: 1/1
• Protocol: SONET/SDH
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Product: PHY
• Supply Voltage (max): 1.89 V, 3.47 V
• Supply Voltage (min): 1.71 V
• Supply Current: 0.7 A
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 1300 mW
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

S i 5 11 0
26
Number(s)
E10
F10
Pin
G8
C4
A2
PHASEADJ
REFCLK+,
REFCLK–
Name
LPTM
LTR
I/O
I
I
I
I
Signal Level
LVPECL
LVTTL
LVTTL
Rev. 1.4
Loop Timed Operation.
When this input is set low, the recovered clock from
the receiver is divided down and used as the refer-
ence source for the transmit CMU. The narrowband
setting for the DSPLL CMU is sufficient to provide
SONET compliant jitter generation and jitter transfer
on the transmit data and clock outputs (TXD-
OUT,TXCLKOUT). Set this pin high for normal opera-
tion.
Note: This input has an internal pullup.
Lock-to-Reference.
When the LTR input is set low, the receiver PLL will
lock to the selected reference clock. This function can
be used to force a stable output clock on the RXCLK1
and RXCLK2 outputs when no valid input data signal
is applied to RXDIN.
When the LTR input is set high, the receiver PLL will
lock to the RXDIN signal (normal operation).
Note: This input has an internal pullup.
Sampling Phase Adjust.
Applying an analog voltage to this pin allows adjust-
ment of the sampling phase across the data eye.
Tieing this input to VREF nominally centers the sam-
pling phase.
Differential Reference Clock.
This input is used as the Si5110 reference clock when
the REFSEL input is set high (REFSEL = 1). The ref-
erence clock sets the operating frequency of the
Si5110 transmit CMU, which is used to generate the
high-speed transmit clock TXCLKOUT. The reference
clock is also used by the Si5110 receiver CDR to cen-
ter the PLL during lock acquisition, and as a reference
for determination of the receiver lock status.
The REFCLK frequency is either 1/16th or 1/32nd of
the serial data rate (nominally 155 or 78 MHz,
respectively). The REFCLK frequency is selected
using the REFRATE input.
When REFSEL = 1, a valid reference clock must be
present.
Description