MC145572FNR2 Freescale Semiconductor, MC145572FNR2 Datasheet - Page 149

• Manufacturer Part Number: MC145572FNR2
• Manufacturer: Freescale Semiconductor

Specifications of MC145572FNR2

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
9.1
9.2
INTRODUCTION
This chapter is a guide for writing software for the MC145572. It provides several pseudo–code exam-
ples on how to initialize and activate the MC145572 U–interface transceiver. NT and LT initiated
activation procedures are given, using both the automatic and non–automatic eoc modes. This
chapter also contains sample initialization routines for IDL–2 timeslot assignment procedures, GCI
electrical mode timeslot assignment, block error rate calculation, and non–ISDN D channel com-
munications.
ACTIVATION AND INITIALIZATION
The MC145572 provides easy microcontroller read and write access to the Maintenance channel via
the SCP or PCP interface. This permits the Maintenance channel to be easily updated and changes
in ANSI T1.601–1992 defined default values to be implemented simply by modifying software. Note
that there are many proprietary applications where the Maintenance channel can be used in any
manner whatsoever. For a discussion of the Maintenance channel, see Chapters 5 and 7.
The MC145572 should be initialized before Activation Request, NR2(b2), is set to a 1, when Activa-
tion in Progress (NR1(b0)) is first detected set to a 1, or when deactivation has been confirmed. This
ensures that the correct data appears on the maintenance channels when linkup is achieved and the
U–interface is activated.
The Software Reset bit (NR0(b3)), need only be set to a 1, then reset to a 0, as part of the power–up
initialization routines.
The MC145572 should be initialized so that when it activates, the correct data is present on all of
the maintenance channels at the time activation occurs. The ANSI T1.601–1992 specification indicates
the default and operational data that should appear on these channels. A microcontroller write to the
specified register puts maintenance data onto the indicated U–interface maintenance channel. A micro-
controller read of the specified register obtains maintenance data from the indicated U–interface main-
tenance channel. These channels are:
Sample initialization routines are provided on how to initialize the MC145572 when operated in the
LT or NT modes. Procedure NTINIT1 in Section 9.2.1 initializes the MC145572 for automatic eoc
operation when configured as an NT. The corresponding sample high level embedded operations
eoc Channel: This channel is accessed via register R6. It is used to convey eoc messages from
the LT to the NT. The NT conveys its acknowledgment of eoc messages back to the LT on this
channel. Typically, this channel is used by the LT to send loopback and other maintenance
messages to the NT. See ANSI T1.601–1992 for currently defined eoc messages and other eoc
procedures.
M4 Maintenance Channel: Data is put on this channel by writing to BR0. Data is read from this
channel by reading BR1. This channel is used by the LT to signal its activation status to the NT.
The LT also uses this channel to tell the NT when it is intending to deactivate the U–interface.
The NT uses this channel to send its activation status to the LT. The NT also uses this channel
to send its power supply status, its warm start capability, and if it is in a test mode, back to the
LT. There are several reserved bits which the ANSI T1.601–1992 specification indicates should
be set to 1s.
M5 and M6 Maintenance Channels: Data is put onto these channels by writing to BR2. Data
is read from these channels by reading BR3. Currently all bits in these channels are defined by
ANSI T1.601–1992 as reserved and should be set to 1s.
MCU MODE PROGRAMMING SUGGESTIONS
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MC145572
9
9–1