PIC16LF1826-I/SS Microchip Technology Inc., PIC16LF1826-I/SS Datasheet - Page 132

• Manufacturer Part Number: PIC16LF1826-I/SS
• Description: 3.5 KB Flash, 256 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, n
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16LF1826-I/SS

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SSOP
• Programmable Memory: 3.5K Bytes
• Ram Size: 256 Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16(L)F1826/27
13.6
REGISTER 13-1:
REGISTER 13-2:
REGISTER 13-3:
DS41391D-page 132
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
R/W/HS-0/0
R/W-0/0
IOCBP7
R/W-0/0
IOCBN7
IOCBF7
Interrupt-On-Change Registers
IOCBP<7:0>: Interrupt-on-Change Positive Edge Enable bits
1 = Interrupt-on-change enabled on the pin for a positive going edge. Associated Status bit and
0 = Interrupt-on-change disabled for the associated pin.
IOCBN<7:0>: Interrupt-on-Change Negative Edge Enable bits
1 = Interrupt-on-change enabled on the pin for a negative going edge. Associated Status bit and
0 = Interrupt-on-change disabled for the associated pin.
IOCBF<7:0>: Interrupt-on-Change Flag bits
1 = An enabled change was detected on the associated pin.
0 = No change was detected, or the user cleared the detected change.
R/W/HS-0/0
R/W-0/0
IOCBP6
R/W-0/0
IOCBN6
IOCBF6
Set when IOCBPx = 1 and a rising edge was detected on RBx, or when IOCBNx = 1 and a falling
edge was detected on RBx.
interrupt flag will be set upon detecting an edge.
interrupt flag will be set upon detecting an edge.
IOCBP: INTERRUPT-ON-CHANGE POSITIVE EDGE REGISTER
IOCBN: INTERRUPT-ON-CHANGE NEGATIVE EDGE REGISTER
IOCBF: INTERRUPT-ON-CHANGE FLAG REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0
R/W-0/0
IOCBP5
R/W-0/0
IOCBN5
IOCBF5
R/W-0/0
IOCBP4
R/W-0/0
IOCBN4
IOCBF4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS - Bit is set in hardware
IOCBP3
IOCBN3
R/W-0/0
R/W-0/0
IOCBF3
R/W/HS-0/0
IOCBN2
R/W-0/0
IOCBP2
R/W-0/0
IOCBF2
 2011 Microchip Technology Inc.
R/W/HS-0/0
IOCBN1
R/W-0/0
IOCBP1
R/W-0/0
IOCBF1
R/W/HS-0/0
R/W-0/0
IOCBP0
R/W-0/0
IOCBN0
IOCBF0
bit 0
bit 0
bit 0