PIC24EP64MC204-E/PT Microchip Technology, PIC24EP64MC204-E/PT Datasheet - Page 109

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PIC24EP64MC204-E/PT

Manufacturer Part Number
PIC24EP64MC204-E/PT
Description
16 Bit MCU, 64KB Flash, 8KB RAM, 60 MHz, 44 Pin, MCPWM,QEI, 3 OpAmp, 4 Comp, PTG
Manufacturer
Microchip Technology
Datasheet

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4.4.4
The W15 register serves as a dedicated software Stack
Pointer (SP) and is automatically modified by exception
processing, subroutine calls and returns; however,
W15 can be referenced by any instruction in the same
manner as all other W registers. This simplifies
reading, writing and manipulating of the Stack Pointer
(for example, creating stack frames).
W15 is initialized to 0x1000 during all Resets. This
address ensures that the SP points to valid RAM in all
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X,
and PIC24EPXXXGP/MC20X devices and permits
stack availability for non-maskable trap exceptions.
These can occur before the SP is initialized by the user
software.
initialization to any location within data space.
The Stack Pointer always points to the first available
free word and fills the software stack working from
lower toward higher addresses.
how it pre-decrements for a stack pop (read) and post-
increments for a stack push (writes).
When the PC is pushed onto the stack, PC<15:0> is
pushed onto the first available stack word, then
PC<22:16> is pushed into the second available stack
location. For a PC push during any CALL instruction,
the MSB of the PC is zero-extended before the push,
as shown in
the MSB of the PC is concatenated with the lower 8 bits
of the CPU STATUS register, SR. This allows the
contents of SRL to be preserved automatically during
interrupt processing.
 2011-2012 Microchip Technology Inc.
Note:
Note 1: To maintain system stack pointer (W15)
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X
2: As the stack can be placed in, and can
You
SOFTWARE STACK
To protect against misaligned stack
accesses, W15<0> is fixed to ‘0’ by the
hardware.
Figure
coherency, W15 is never subject to
(EDS) paging, and is therefore restricted
to an address range of 0x0000 to
0xFFFF. The same applies to the W14
when used as a Stack Frame Pointer
(SFA = 1).
access, X and Y spaces, care must be
taken regarding its use, particularly with
regard to local automatic variables in a C
development environment
can
4-19. During exception processing,
reprogram
Figure 4-19
the
SP
illustrates
during
FIGURE 4-19:
4.5
The addressing modes shown in
basis of the addressing modes optimized to support the
specific features of individual instructions. The
addressing modes provided in the MAC class of
instructions differ from those in the other instruction
types.
4.5.1
Most file register instructions use a 13-bit address field
(f) to directly address data present in the first 8192
bytes of data memory (near data space). Most file
register instructions employ a working register, W0,
which is denoted as WREG in these instructions. The
destination is typically either the same file register or
WREG (with the exception of the MUL instruction),
which writes the result to a register or register pair. The
MOV instruction allows additional flexibility and can
access the entire data space.
4.5.2
The three-operand MCU instructions are of the form:
Operand 3 = Operand 1 <function> Operand 2
where Operand 1 is always a working register (that is,
the addressing mode can only be Register Direct),
which is referred to as Wb. Operand 2 can be a W reg-
ister, fetched from data memory, or a 5-bit literal. The
result location can be either a W register or a data
memory location. The following addressing modes are
supported by MCU instructions:
• Register Direct
• Register Indirect
• Register Indirect Post-Modified
• Register Indirect Pre-Modified
• 5-bit or 10-bit Literal
0x0000
Note:
Instruction Addressing Modes
15
b‘000000000’
FILE REGISTER INSTRUCTIONS
MCU INSTRUCTIONS
Not all instructions support all the
addressing modes given above. Individ-
ual instructions can support different
subsets of these addressing modes.
<Free Word>
PC<15:1>
CALL STACK FRAME
PC<22:16>
0
Table 4-63
DS70657F-page 109
W15 (before CALL)
W15 (after CALL)
CALL
SUBR
form the

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